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Showing items 1-5 of 5 (1 Page(s) Totally) 1 View [10|25|50] records per page
國立交通大學 |
2014-12-12T02:44:07Z |
三軸加速度計整合分頻多工讀出電路設計
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林鴻庭; Lin, Hong-Ting; 溫瓌岸; Wen, Kuei-Ann |
國立成功大學 |
2014-04 |
Pulsed-Latch Utilization for Clock-Tree Power Optimization
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Lin, Hong-Ting; Chuang, Yi-Lin; Yang, Zong-Han; Ho, Tsung-Yi |
國立成功大學 |
2012-06 |
Load-Balanced Clock Tree Synthesis with Adjustable Delay Buffer Insertion for Clock Skew Reduction in Multiple Dynamic Supply Voltage Designs
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Lin, Kuan-Yu; Lin, Hong-Ting; Ho, Tsung-Yi; Tsai, Chia-Chun |
國立成功大學 |
2011-08-29 |
考量脈波拴鎖電路以減少動態功率消耗之時鐘樹遷移
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林虹廷; Lin, Hong-Ting |
國立臺中教育大學 |
2005 |
「國內大專物理教科書」之內容分析
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林弘庭; Lin, Hong-Ting |
Showing items 1-5 of 5 (1 Page(s) Totally) 1 View [10|25|50] records per page
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