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Showing items 1-8 of 8 (1 Page(s) Totally)
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| 國立成功大學 |
2013-04 |
Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-Flops
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Shyu, Ya-Ting; Lin, Jai-Ming; Huang, Chun-Po; Lin, Cheng-Wu; Lin, Ying-Zu; Chang, Soon-Jyh |
| 國立成功大學 |
2013-03 |
A 9-Bit 150-MS/s Subrange ADC Based on SAR Architecture in 90-nm CMOS
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Lin, Ying-Zu; Liu, Chun-Cheng; Huang, Guan-Ying; Shyu, Ya-Ting; Liu, Yen-Ting; Chang, Soon-Jyh |
| 國立成功大學 |
2013-03 |
10-bit 30-MS/s SAR ADC Using a Switchback Switching Method
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Huang, Guan-Ying; Chang, Soon-Jyh; Liu, Chun-Cheng; Lin, Ying-Zu |
| 國立成功大學 |
2012-11 |
A 1-mu W 10-bit 200-kS/s SAR ADC With a Bypass Window for Biomedical Applications
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Huang, Guan-Ying; Chang, Soon-Jyh; Liu, Chun-Cheng; Lin, Ying-Zu |
| 國立成功大學 |
2010-06-09 |
CMOS高速比較器式類比數位轉換器
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林英儒; Lin, Ying-Zu |
| 國立成功大學 |
2009-02 |
A 5-bit 4.2-GS/s Flash ADC in 0.13-mu m CMOS Process
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Lin, Ying-Zu; Chang, Soon-Jyh; Liu, Yen-Ting |
| 國立成功大學 |
2008-11 |
A Digitally Calibrated CMOS Transconductor With a 100-MHz Bandwidth and 75-dB SFDR
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Chang, Soon-Jyh; Lin, Ying-Zu; Liu, Yen-Ting |
| 國立成功大學 |
2005-07-19 |
操作於2 GHz之單一類比路徑六位元快閃式類比數位轉換器
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林英儒; Lin, Ying-Zu |
Showing items 1-8 of 8 (1 Page(s) Totally)
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