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| 淡江大學 |
1995-02 |
On the construction of a prolog-based verifier for systolic array designs
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施國琛; Shih, Timothy K.; Ling, Nam; Davis, Ruth; Lin, Fuyau |
| 淡江大學 |
1994-09 |
A Temporal Arithmetic Based Reasoning System for Systolic Array Designs
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施國琛; Shih, Timothy K.; Ling, Nam |
| 淡江大學 |
1993-08 |
VSTA : a prolog-based formal verifier for systolic array designs
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Ling, Nam; 施國琛; Shih, Timothy K. |
| 淡江大學 |
1991-11 |
An automatic design specification and verification tool for systolic array designe
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Lin, Fu-yau; 施國琛; Shih, Timothy K.; Ling, Nam |
Showing items 1-4 of 4 (1 Page(s) Totally)
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