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Showing items 11-35 of 144  (6 Page(s) Totally)
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Institution Date Title Author
臺大學術典藏 2020-10-26T11:34:45Z Diagnostic procedures, revascularization, and inpatient mortality after acute myocardial infarction in patients with schizophrenia and bipolar disorder Stewart R.; Kao K.-L.; Dewey M.; Prince M.J.; Sun F.-J.; Fang C.-K.; Liu S.-I.; JYH-MING JIMMY JUANG; Wu S.-I.; Chen S.-C.
臺大學術典藏 2020-10-26T11:34:40Z Relative risk of acute myocardial infarction in people with schizophrenia and bipolar disorder: A population-based cohort study JYH-MING JIMMY JUANG; Lee H.-C.; Liu S.-I.; Sun F.-J.; Chen S.-C.; Wu S.-I.; Kao K.-L.; Dewey M.E.; Prince M.; Stewart R.; Van Winkel R.
臺大學術典藏 2020-08-21T07:43:08Z The association between social relationships and self-harm: A case-control study in Taiwan Wu C.-Y.;Chin-Kuo Chang;Huang H.-C.;Liu S.-I.;Stewart R.; Wu C.-Y.; CHIN-KUO CHANG; Huang H.-C.; Liu S.-I.; Stewart R.
臺大學術典藏 2020-06-11T06:34:57Z A digital bang-bang phase-locked loop with automatic loop gain control and loop latency reduction Kuan, T.-K.;Liu, S.-I.; Kuan, T.-K.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:57Z Ultrasonic telemetry and neural stimulator with FSK-PWM signaling Luo, Y.-S.;Wang, J.-R.;Huang, W.-J.;Tsai, J.-Y.;Wu, I.-C.;Liao, Y.-F.;Tseng, W.-T.;Yen, C.-T.;Li, P.-C.;Liu, S.-I.; Luo, Y.-S.; Wang, J.-R.; Huang, W.-J.; Tsai, J.-Y.; Wu, I.-C.; Liao, Y.-F.; Tseng, W.-T.; Yen, C.-T.; Li, P.-C.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:57Z Ultrasonic wireless power and data communication for neural stimulation Tsai, J.-Y.;Huang, K.-H.;Wang, J.-R.;Liu, S.-I.;Li, P.-C.; Tsai, J.-Y.; Huang, K.-H.; Wang, J.-R.; Liu, S.-I.; Li, P.-C.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:56Z A 12-bit 3.4 MS/s two-step cyclic time-domain ADC in 0.18-μm CMOS Chen, L.-J.;Liu, S.-I.; Chen, L.-J.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:56Z An On-Chip Relaxation Oscillator with Comparator Delay Compensation Chang, Y.-A.;Adiono, T.;Hamidah, A.;Liu, S.-I.; Chang, Y.-A.; Adiono, T.; Hamidah, A.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:56Z A PVT-Tolerant Injection-Locked Clock Multiplier with a Frequency Calibrator Using a Delay Time Detector Tien, C.-W.;Liu, S.-I.; Tien, C.-W.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:56Z A 2.4-GHz frequency-drift-compensated phase-locked loop with 2.43 ppm/°C temperature coefficient Hsieh, C.-E.;Liu, S.-I.; Hsieh, C.-E.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:55Z A Subharmonically Injection-Locked All-Digital PLL Without Main Divider Zeng, K.-H.;Kuan, T.-K.;Liu, S.-I.; Zeng, K.-H.; Kuan, T.-K.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:55Z A 10-bit 40-MS/s Time-Domain Two-Step ADC with Short Calibration Time Chen, L.-J.;Liu, S.-I.; Chen, L.-J.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:54Z A 20-MHz to 3-GHz wide-range multiphase delay-locked loop Chuang, C.-N.;Liu, S.-I.; Chuang, C.-N.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:54Z A 20-Gb/s transmitter with adaptive preemphasis in 65-nm CMOS technology Kao, S.-Y.;Liu, S.-I.; Kao, S.-Y.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:54Z A 132.6-GHz phase-locked loop in 65 nm digital CMOS Lin, B.-Y.;Liu, S.-I.; Lin, B.-Y.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:54Z A 3-25 Gb/s four-channel receiver with noise-canceling TIA and power-scalable sLA Chien, Y.-H.;Fu, K.-L.;Liu, S.-I.; Chien, Y.-H.; Fu, K.-L.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:53Z A leakage-compensated PLL in 65-nm CMOS technology Hung, C.-C.;Liu, S.-I.; Hung, C.-C.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:52Z A 10-20 Gb/s CDR circuit with 6200ppm frequency tracking Huang, C.-C.;Tseng, K.-W.;Liu, S.-I.; Huang, C.-C.; Tseng, K.-W.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:52Z A 2.25-2.7 GHz Area-Efficient Subharmonically Injection-Locked Fractional-N Frequency Synthesizer with a Fast-Converging Correlation Loop Tseng, Y.-H.;Yeh, C.-W.;Liu, S.-I.; Tseng, Y.-H.; Yeh, C.-W.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:52Z A 5 Gb/s Voltage-Mode Transmitter Using Adaptive Time-Based De-Emphasis Su, W.-J.;Liu, S.-I.; Su, W.-J.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:51Z A Bang-Bang Phase-Locked Loop Using Automatic Loop Gain Control and Loop Latency Reduction Techniques Kuan, T.-K.;Liu, S.-I.; Kuan, T.-K.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:51Z A 6.7 MHz to 1.24 GHz 0.0318 mm 2 Fast-Locking All-Digital DLL Using Phase-Tracing Delay Unit in 90 nm CMOS Hsieh, M.-H.; Chen, L.-H.; Liu, S.-I.; Chen, C.C.-P.; SHEN-IUAN LIU; Hsieh, M.-H.;Chen, L.-H.;Liu, S.-I.;Chen, C.C.-P.
臺大學術典藏 2020-06-11T06:34:51Z A Voltage Multiplier With Adaptive Threshold Voltage Compensation Luo, Y.-S.;Liu, S.-I.; Luo, Y.-S.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:50Z A 33.6-to-33.8 Gb/s burst-mode CDR in 90 nm CMOS technology Cho, L.-C.;Lee, C.;Hung, C.-C.;Liu, S.-I.; Cho, L.-C.; Lee, C.; Hung, C.-C.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:34:50Z A 1.5 GHz all-digital spread-spectrum clock generator Lin, S.-Y.;Liu, S.-I.; Lin, S.-Y.; Liu, S.-I.; SHEN-IUAN LIU

Showing items 11-35 of 144  (6 Page(s) Totally)
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