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Showing items 1-14 of 14 (1 Page(s) Totally)
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| 國立交通大學 |
2018-08-21T05:53:53Z |
Simulation-based study of negative-capacitance double-gate tunnel field-effect transistor with ferroelectric gate stack
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Liu, Chien; Chen, Ping-Guang; Xie, Meng-Jie; Liu, Shao-Nong; Lee, Jun-Wei; Huang, Shao-Jia; Liu, Sally; Chen, Yu-Sheng; Lee, Heng-Yuan; Liao, Ming-Han; Chen, Pang-Shiu; Lee, Min-Hung |
| 國立交通大學 |
2017-04-21T06:48:58Z |
Simulation-based study of negative-capacitance double-gate tunnel field-effect transistor with ferroelectric gate stack
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Liu, Chien; Chen, Ping-Guang; Xie, Meng-Jie; Liu, Shao-Nong; Lee, Jun-Wei; Huang, Shao-Jia; Liu, Sally; Chen, Yu-Sheng; Lee, Heng-Yuan; Liao, Ming-Han; Chen, Pang-Shiu; Lee, Min-Hung |
| 國立交通大學 |
2014-12-08T15:24:43Z |
High performance band-pass filter embedded into SoCs using VLSI backend interconnects and high resistivity silicon substrate
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Chen, C. C.; Chin, Albert; Yang, M. T.; Liu, Sally |
| 國立交通大學 |
2014-12-08T15:16:09Z |
Reproducing subthreshold characteristics of metal-oxide-semiconductor field effect transistors under shallow trench isolation mechanical stress using a stress-dependent diffusion model
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Sheu, Yi-Ming; Yang, Sheng-Jier; Wang, Chih-Chiang; Chang, Chih-Sheng; Chen, Ming-Jer; Liu, Sally; Diaz, Carlos H. |
| 國立交通大學 |
2014-12-08T15:15:28Z |
Modeling the well-edge proximity effect in highly scaled MOSFETs
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Sheu, Yi-Ming; Su, Ke-Wei; Tian, Shiyang; Yang, Sheng-Jier; Wang, Chih-Chiang; Chen, Ming-Jer; Liu, Sally |
| 國立交通大學 |
2014-12-08T15:12:40Z |
Investigation of anomalous inversion C-V characteristics for long-channel MOSFETs with leaky dielectrics: Mechanisms and reconstruction
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Lee, Wei; Su, Pin; Su, Ke-Wei; Chiang, Chung-Shi; Liu, Sally |
| 國立交通大學 |
2014-12-08T15:09:00Z |
High-Performance Slow-Wave Transmission Lines With Optimized Slot-Type Floating Shields
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Cho, Hsiu-Ying; Yeh, Tzu-Jin; Liu, Sally; Wu, Chung-Yu |
| 國立交通大學 |
2014-12-08T15:08:52Z |
OPTIMIZATION AND MODELING FOR MOS VARACTORS IN 65 nm LOW-POWER MIXED-SIGNAL/RADIO-FREQUENCY TECHNOLOGY
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Chen, Chia Chung; Jiang, Meshon; Chang, Li Ming; Yeh, Tzu Jin; Liu, Feng Ming; Liu, Sally |
| 國立交通大學 |
2014-12-08T15:08:11Z |
A Novel Transmission-Line Deembedding Technique for RF Device Characterization
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Cho, Hsiu-Ying; Huang, Jiun-Kai; Kuo, Chin-Wei; Liu, Sally; Wu, Chung-Yu |
| 國立交通大學 |
2014-12-08T15:06:23Z |
Investigation of inversion capacitance-voltage reconstruction for metal oxide semiconductor field effect transistors with leaky dielectrics using BSIM4/SPICE and intrinsic input resistance model
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Lee, Wei; Su, Pin; Su, Ke-Wei; Chiang, Chung-Shi; Liu, Sally |
| 國立成功大學 |
2011-10 |
A Low-Flicker Noise Gate-Controlled Lateral-Vertical Bipolar Junction Transistor Array With 55-nm CMOS Technology
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Chen, Shuo-Mao; Fang, Yean-Kuen; Juang, Feng-Renn; Chen, Chia-Chung; Liu, Sally; Kuo, Chin-Wei; Chao, Chih-Ping; Tseng, Hua-Chou |
| 國立臺灣大學 |
2006-10 |
Analysis of the Gate–Source/Drain Capacitance Behavior of a Narrow-Channel FD SOI NMOS Device Considering the 3-D Fringing Capacitances Using 3-D Simulation
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Chen, Chien-Chung; Kuo, James B.; Su, Ke-Wei; Liu, Sally |
| 臺大學術典藏 |
2006-10 |
Analysis of the Gate–Source/Drain Capacitance Behavior of a Narrow-Channel FD SOI NMOS Device Considering the 3-D Fringing Capacitances Using 3-D Simulation
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Chen, Chien-Chung; Kuo, James B.; Su, Ke-Wei; Liu, Sally; Chen, Chien-Chung; Kuo, James B.; Su, Ke-Wei; Liu, Sally |
| 國立臺灣大學 |
2006 |
Analysis of the gate-source/drain capacitance behavior of a narrow-channel FD SOI NMOS device considering the 3-D fringing capacitances using 3-D simulation
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Chen, Chien-Chung; Kuo, J.B.; Su, Ke-Wei; Liu, Sally |
Showing items 1-14 of 14 (1 Page(s) Totally)
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