| 國立臺灣大學 |
2000-08 |
A 2 V clock synchronizer using digital delay-locked loop
|
Hwang, Chorng-Sii; Chung, Wang-Chih; Wang, Chih-Yong; Tsao, Hen-Wai; Liu, Shen-Iuan |
| 國立臺灣大學 |
2000-08 |
Current-mode pseudo-exponential circuit with tunable input range
|
Chang, Cheng-Chieh; Liu, Shen-Iuan |
| 臺大學術典藏 |
2000-08 |
A 2 V clock synchronizer using digital delay-locked loop
|
Hwang, Chorng-Sii; Chung, Wang-Chih; Wang, Chih-Yong; Tsao, Hen-Wai; Liu, Shen-Iuan; Hwang, Chorng-Sii; Chung, Wang-Chih; Wang, Chih-Yong; Tsao, Hen-Wai; Liu, Shen-Iuan |
| 臺大學術典藏 |
2000-08 |
Current-mode pseudo-exponential circuit with tunable input range
|
Chang, Cheng-Chieh; Liu, Shen-Iuan; Chang, Cheng-Chieh; Liu, Shen-Iuan |
| 淡江大學 |
2000-02 |
A double-sampling pseudo-two-path bandpass delta-sigma modulator
|
Liu, Shen-iuan; Kuo, Chien-hung; Tsai, Ruey-yuan; Wu, Jing-shown |
| 國立臺灣大學 |
2000-01 |
Realisation of exponential V-I converter using composite NMOS transistors
|
Liu, Weihsing; Chang, Cheng-Chieh; Liu, Shen-Iuan |
| 國立臺灣大學 |
2000 |
A double-sampling pseudo-two-path bandpass ΔΣ modulator
|
Liu, Shen-Iuan; Kuo, Chien-Hung; Tsai, Ruey-Yuan; Wu, Jingshown |
| 國立臺灣大學 |
2000 |
A 900-MHz/1-V CMOS frequency synthesizer
|
Dehng, Guang-Kaai; Yang, Ching-Yuan; Hsu, June-Ming; Liu, Shen-Iuan |
| 國立臺灣大學 |
2000 |
Clock-deskew buffer using a SAR-controlled delay-locked loop
|
Dehng, Guang-Kaai; Hsu, June-Ming; Yang, Ching-Yuan; Liu, Shen-Iuan |
| 國立臺灣大學 |
2000 |
Fast-switching frequency synthesizer with a discriminator-aided phase detector
|
Yang, Ching-Yuan; Liu, Shen-Iuan |
| 國立臺灣大學 |
2000 |
Pseudo-exponential function for MOSFETs in saturation
|
Chang, Cheng-Chieh; Liu, Shen-Iuan |
| 臺大學術典藏 |
2000 |
A double-sampling pseudo-two-path bandpass ΔΣ modulator
|
Liu, Shen-Iuan; Kuo, Chien-Hung; Tsai, Ruey-Yuan; Wu, Jingshown; Liu, Shen-Iuan; Kuo, Chien-Hung; Tsai, Ruey-Yuan; Wu, Jingshown |
| 國立臺灣大學 |
1999-10 |
Dual-input RC integrator and differentiator with tuneable time constants using current feedback amplifiers
|
Lee, Jiin-Long; Liu, Shen-Iuan |
| 國立臺灣大學 |
1999-05 |
A cyclic CMOS time-to-digital converter with deep sub-nanosecond resolution
|
Chen, Poki; Liu, Shen-Iuan |
| 國立臺灣大學 |
1999 |
Analogue BiCMOS squarer and its applications
|
Chang, Cheng-Chieh; Liu, Shen-Iuan; Lee, Jiin-Long |
| 國立臺灣大學 |
1999 |
Low-power clock-deskew buffer for high-speed digital circuits
|
Liu, Shen-Iuan; Lee, Jiunn-Hwa; Tsao, Hen-Wai |
| 國立臺灣大學 |
1999 |
Spice Macro model for MAGFET and its applications
|
Liu, Shen-Iuan; Wei, Jian-Fan; Sung, Guo-Ming |
| 國立臺灣大學 |
1999 |
Low-voltage BiCMOS four-quadrant multiplier using triode-region transistors
|
Liu, Shen-Iuan; Lee, Jiin-Long; Chang, Cheng-Chieh |
| 國立臺灣大學 |
1999 |
Low-voltage BiCMOS four-quadrant multiplier and squarer
|
Liu, Shen-Iuan; Lee, Jiin-Long; Chang, Cheng-Chieh |
| 國立臺灣大學 |
1998-10 |
Weak inversion four-quadrant multiplier and two-quadrant divider
|
Chang, Cheng-Chieh; Liu, Shen-Iuan |
| 國立臺灣大學 |
1997-09 |
High-speed divide-by-4/5 counter for a dual-modulus prescaler
|
Yang, Ching-Yuan; Dehng, Guang-Kaai; Liu, Shen-Iuan |
| 國立臺灣大學 |
1997-07 |
Single-resistance-controlled sinusoidal oscillator using two FTFNs
|
Liu, Shen-Iuan |
| 國立臺灣大學 |
1997-06 |
Analog maximum, median and minimum circuit
|
Liu, Shen-Iuan; Chen, Poki; Chen, Chin-Yang; Hwu, Jenn-Gwo |
| 國立臺灣大學 |
1997-05 |
Highly accurate cyclic CMOS time-to-digital converter with extremely low power consumption
|
Chen, Poki; Liu, Shen-Iuan; Wu, Jingshown |
| 國立臺灣大學 |
1997-01 |
Low-voltage CMOS four-quadrant multiplier
|
Liu, Shen-Iuan; Chang, Chen-Chieh |
