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Taiwan Academic Institutional Repository >
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"liu yu sian"
Showing items 1-4 of 4 (1 Page(s) Totally)
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| 國立交通大學 |
2019-04-02T06:01:00Z |
Monolithic Low Noise and Low Zero-g Offset CMOS/MEMS Accelerometer Readout Scheme
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Liu, Yu-Sian; Wen, Kuei-Ann |
| 國立交通大學 |
2019-04-02T05:58:19Z |
Implementation of a CMOS/MEMS Accelerometer with ASIC Processes
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Liu, Yu-Sian; Wen, Kuei-Ann |
| 國立交通大學 |
2014-12-12T02:34:53Z |
具備 0g 校正之 CMOS/MEMS 加速度計單晶片設計
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劉昱賢; Liu, Yu-Sian; 溫瓌岸; Wen, Kuei-Ann |
| 國立交通大學 |
2014-12-08T15:36:54Z |
A Monolithic CMOS/MEMS Accelerometer with Zero-g Calibration Readout Circuit
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Liu, Yu-Sian; Huang, Chien-Jo; Kuo, Fu-Yen; Wen, Kuei-Ann; Fan, Long-Sheng |
Showing items 1-4 of 4 (1 Page(s) Totally)
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