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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
國家衛生研究院 2022-12-02 Manipulating the distribution of surface charge of PEDOT toward zwitterion-like antifouling properties Lin, TY;Lo, WY;Kao, TY;Lin, CH;Wu, YK;Luo, SC
朝陽科技大學 2017-04 Characterisation of raw water resources in northern and central Taiwan Lo, FC;Lin, KL;Pai, TY;Lo, SL;Chiu, HY;Chang, TC;Lo, SW;Liu, MH;CA, Chang;Wang, SC;Chiang, CF;Chao, KP;Lo, WY;Chu, YL;Lo, HM*
朝陽科技大學 2016-05-26 Electricity production from municipal solid waste using microbial fuel cells Chiu, HY;Pai, TY;Liu, MH;Chang, CA;Lo, FC;Chang, TC;Lo, HM;Chiang, CF;Chao, KP;Lo, WY;Lo, SW;Chu, YL
國立交通大學 2014-12-08T15:45:27Z Design on the low-leakage diode string for using in the power-rail ESD clamp circuits in a 0.35-mu m silicide CMOS process Ker, MD; Lo, WY
國立交通大學 2014-12-08T15:42:38Z Exact solution of inventory replenishment policy for a linear trend in demand - two-equation model Lo, WY; Tsai, CH; Li, RK
國立交通大學 2014-12-08T15:40:59Z Methodology on extracting compact layout rules for latchup prevention in deep-submicron bulk CMOS technology Ker, MD; Lo, WY
國立交通大學 2014-12-08T15:40:26Z Analysis and prevention on NC-ball induced ESD damages in a 683-pin BGA packaged chipset IC Lo, WY; Ker, MD
國立交通大學 2014-12-08T15:39:34Z Abnormal ESD failure mechanism in high-pin-count BGA packaged ICs due to stressing nonconnected balls Lo, WY; Ker, MD
國立交通大學 2014-12-08T15:27:05Z New diode string design with very low leakage current for using in power supply ESD clamp circuits Ker, MD; Lo, WY; Chang, HH
國立交通大學 2014-12-08T15:26:51Z Compact layout rule extraction for latchup prevention in a 0.25-mu m shallow-trench-isolation silicided bulk CMOS process Ker, MD; Lo, WY; Chen, TY; Tang, H; Chen, SS; Wang, MC

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