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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"lu jian hao"的相關文件
顯示項目 1-8 / 8 (共1頁) 1 每頁顯示[10|25|50]項目
臺大學術典藏 |
2020-06-11T06:34:53Z |
A 10-Gb/s Inductorless CMOS Analog Equalizer With an Interleaved Active Feedback Topology (vol 56, pg 97, 2009)
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Lu, Jian-Hao;Chen, Ke-Hou;Liu, Shen-Iuan; Lu, Jian-Hao; Chen, Ke-Hou; Liu, Shen-Iuan; SHEN-IUAN LIU |
國立交通大學 |
2014-12-08T15:25:29Z |
Low temperature polycrystalline silicon thin film transistors fabricated by amorphous silicon spacer structure with pre-patterned TEOS oxide layer
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Cheng, Huang-Chung; Tsai, Chun-Chien; Lu, Jian-Hao; Chang, Ting-Kuo; Lin, Ching-Wei; Chen, Bo-Ting |
國立交通大學 |
2014-12-08T15:15:06Z |
Periodically lateral silicon grains fabricated by excimer laser irradiation with a-Si spacers for LTPS TFTs
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Cheng, Huang-Chung; Tsai, Chun-Chien; Lu, Jian-Hao; Chen, Hsu-Hsin; Chen, Bo-Ting; Chang, Ting-Kuo; Lin, Ching-Wei |
國立臺灣大學 |
2010 |
A merged CMOS digital near-end crosstalk canceller and analog equalizer for multi-lane serial-link receivers
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Lu, Jian-Hao; Liu, Shen-Iuan |
國立臺灣大學 |
2010 |
應用於多通道串接式接收機之高速類比等化器與數位式近端干擾消除電路
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呂健豪; Lu, Jian-Hao |
國立臺灣大學 |
2009 |
A 50-Gb/s 10-mW analog equalizer using transformer feedback technique in 65-nm CMOS technology
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Lu, Jian-Hao; Liu, Shen-Iuan |
國立臺灣大學 |
2009 |
A 10-Gb/s Inductorless CMOS Analog Equalizer With an Interleaved Active Feedback Topology
|
Lu, Jian-Hao; Chen, Ke-Hou; Liu, Shen-Iuan |
國立臺灣大學 |
2007 |
An Ultra-Wide-Band 0.4–10-GHz LNA in 0.18-μm CMOS
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Chen, Ke-Hou; Lu, Jian-Hao; Chen, Bo-Jiun; Liu, Shen-Iuan |
顯示項目 1-8 / 8 (共1頁) 1 每頁顯示[10|25|50]項目
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