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Taiwan Academic Institutional Repository >
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"lu liang hung"
Showing items 21-30 of 60 (6 Page(s) Totally)
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| 國立臺灣大學 |
2008 |
An image-band-rejection technique for error detection of on-chip quadrature phases
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Lai, Li-Shin; Hsieh, Hsieh-Hung; Lu, Liang-Hung |
| 國立臺灣大學 |
2007 |
A 16-GHz triple-modulus phase-switching prescaler and its application to a 15-GHz frequency synthesizer in 0.18-μm CMOS
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Peng, Yu-Hsun; Lu, Liang-Hung |
| 國立臺灣大學 |
2007 |
A high-performance CMOS voltage-controlled oscillator for ultra-low-voltage operations
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Hsieh, Hsieh-Hung; Lu, Liang-Hung |
| 國立臺灣大學 |
2007 |
A 15/30-GHz Dual-Band Multiphase Voltage-Controlled Oscillator in 0.18- μm CMOS
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Hsieh, Hsieh-Hung; Hsu, Ying-Chih; Lu, Liang-Hung |
| 國立臺灣大學 |
2007 |
An ultra-wideband distributed active mixer MMIC in 0.18-μm CMOS technology
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Wu, Chong-Ru; Hsieh, Hsieh-Hung; Lu, Liang-Hung |
| 國立臺灣大學 |
2007 |
A Ku-Band Frequency Synthesizer in 0.18-μm CMOS Technology
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Peng, Yu-Hsun; Lu, Liang-Hung |
| 國立臺灣大學 |
2007 |
A 10-Gb/s inductorless CMOS limiting amplifier with third-order interleaving active feedback
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Huang, Huei-Yan; Chien, Jun-Chau; Lu, Liang-Hung |
| 國立臺灣大學 |
2007 |
A compact quadrature hybrid MMIC using CMOS active inductors
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Hsieh, Hsieh-Hung; Liao, Yu-Te; Lu, Liang-Hung |
| 國立臺灣大學 |
2007 |
Design of ultra-low-voltage RF frontends with complementary current-reused architectures
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Hsieh, Hsieh-Hung; Lu, Liang-Hung |
| 國立臺灣大學 |
2007 |
A 20-Gb/s 1:2 Demultiplexer with capacitive-splitting current-mode-logic latches
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Chien, Jun-Chau; Lu, Liang-Hung |
Showing items 21-30 of 60 (6 Page(s) Totally)
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