| 國立臺灣科技大學 |
2015 |
Electrical interconnect test of 3D ICs made of dies without ESD protection circuits with a built-in test circuit
|
Nanbara, K.;Odoriba, A.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K. |
| 國立臺灣科技大學 |
2015 |
A testable design for electrical interconnect tests of 3D ICs
|
Odoriba, A.;Umezu, S.;Hashizume, M.;Yotsuyanagi, H.;Ali, F.A.B.;Lu, S.-K. |
| 國立臺灣科技大學 |
2015 |
An enhanced built-in self-repair technique for yield and reliability improvement of embedded memories
|
Lu, S.-K;Lin, H.-W;Hashizume, M. |
| 國立臺灣科技大學 |
2015 |
Electrical interconnect test method of 3D ICs without boundary scan flip flops
|
Hashizume, M;Umezu, S;Ikiri, Y;Ali, F.A.B;Yotsuyanagi, H;Lu, S.-K. |
| 國立臺灣科技大學 |
2014 |
A power saving mechanism for multimedia streaming services in cloud computing
|
Ma, Y.-W.;Chen, J.-L.;Chou, C.-H.;Lu, S.-K. |
| 國立臺灣科技大學 |
2013 |
Testable design for electrical testing of open defects at interconnects in 3D ICs
|
Hashizume, M.;Konishi, T.;Yotsuyanag, H.;Lu, S.-K. |
| 國立臺灣科技大學 |
2013 |
Error-tolerance evaluation and design techniques for motion estimation computing arrays
|
Lu, S.-K.;Chen, M.-C.;Chen, Y.-C. |
| 國立臺灣科技大學 |
2013 |
Efficient test and repair architectures for 3D TSV-based random access memories
|
Lu, S.-K.;Lu, U.-C.;Pong, S.-W.;Cheng, H.-C. |
| 國立臺灣科技大學 |
2013 |
Reduction method of number of electromagnetic simulation times for estimating output voltage at hard open TSV in 3D IC
|
Haraguchi, E.;Hashizume, M.;Manabe, K.;Yotsuyanagi, H.;Tada, T.;Lu, S.-K.;Roth, Z. |
| 國立臺灣科技大學 |
2013 |
Built-in IDDT appearance time sensor for detecting open faults in 3D IC
|
Suenaga, S.;Hashizume, M.;Yotsuyanagi, H.;Tada, T.;Lu, S.-K. |
| 國立臺灣科技大學 |
2013 |
Fault scrambling techniques for yield enhancement of embedded memories
|
Lu, S.-K.;Jheng, H.-C.;Hashizume, M.;Huang, J.-L.;Ning, P. |
| 國立臺灣科技大學 |
2013 |
DFT for supply current testing to detect open defects at interconnects in 3D ICs
|
Suenaga, S.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K.;Roth, Z. |
| 國立臺灣科技大學 |
2013 |
An efficient test and repair flow for yield enhancement of one-time-programming NROM-based ROMs
|
Li, T.-L.;Hashizume, M.;Lu, S.-K. |
| 國立臺灣科技大學 |
2013 |
Synergistic reliability and yield enhancement techniques for embedded SRAMs
|
Lu, S.-K.;Huang, H.-H.;Huang, J.-L.;Ning, P. |
| 國立臺灣科技大學 |
2012 |
Efficient built-in self-repair techniques for multiple repairable embedded RAMs
|
Lu, S.-K.;Wang, Z.-Y.;Tsai, Y.-M.;Chen, J.-L. |
| 國立臺灣科技大學 |
2012 |
Improving reusability of test symbols for test data compression
|
Lu, S.-K.;Huang, Y.-C. |
| 國立臺灣科技大學 |
2012 |
Scrambling and data inversion techniques for yield enhancement of NROM-Based ROMs
|
Lu, S.-K.;Li, T.-L.;Ning, P. |
| 國立臺灣科技大學 |
2012 |
On test and repair of 3D random access memory
|
Wu, C.-W.; Lu, S.-K.; Li, J.-F. |
| 國立臺灣科技大學 |
2012 |
Yield enhancement techniques for 3-dimensional random access memories
|
Lu, S.-K.;Chang, T.-W.;Hsu, H.-Y. |
| 國立臺灣科技大學 |
2011 |
Speeding Up Emulation-Based Diagnosis Techniques for Logic Cores
|
Lu, S.K.;Chen, Y.M.;Huang, S.Y.;Wu, C.W. |
| 國立臺灣科技大學 |
2009 |
Wireless built-in self-repair architectures for embedded RAMs
|
Wang Z.-Y; Tsai Y.-M.; Hsiao Y.-C.; Lu S.-K. |
| 國立臺灣科技大學 |
2009 |
Built-in self-repair techniques for heterogeneous memory cores
|
Wang Z.-Y.; Tsai Y.-M.; Lu S.-K. |
| 國立臺灣大學 |
1993-05 |
Enhancing testability of VLSI arrays for fast Fourier transform
|
Lu, S.-K.; Wu, C.-W.; Kuo, S.-Y. |
| 國立臺灣大學 |
1992-03 |
Testable Design of Systolic Arrays for Discrete Cosine Transform
|
Lu, S. K.; Wu, C. W.; 郭斯彥; Lu, S. K.; Wu, C. W.; Kuo, Sy-Yen |
| 臺大學術典藏 |
1992-03 |
Testable Design of Systolic Arrays for Discrete Cosine Transform
|
Wu, C. W.; Lu, S. K.; Kuo, Sy-Yen; Lu, S. K.; Wu, C. W.; 郭斯彥; Lu, S. K.; Kuo, Sy-Yen |
