English  |  正體中文  |  简体中文  |  0  
???header.visitor??? :  51971006    ???header.onlineuser??? :  877
???header.sponsordeclaration???
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
???ui.leftmenu.abouttair???

???ui.leftmenu.bartitle???

???index.news???

???ui.leftmenu.copyrighttitle???

???ui.leftmenu.link???

"lue hang ting"???jsp.browse.items-by-author.description???

???jsp.browse.items-by-author.back???
???jsp.browse.items-by-author.order1??? ???jsp.browse.items-by-author.order2???

Showing items 1-10 of 17  (2 Page(s) Totally)
1 2 > >>
View [10|25|50] records per page

Institution Date Title Author
臺大學術典藏 2021-05-24T13:07:21Z Robust Brain-Inspired Computing: On the Reliability of Spiking Neural Network Using Emerging Non-Volatile Synapses Wei, Ming Liang; Amrouch, Hussam; Sung, Cheng Lin; Lue, Hang Ting; CHIA-LIN YANG; Wang, Keh Chung; Lu, Chih Yuan
臺大學術典藏 2020-05-04T08:06:49Z On Trading Wear-leveling with Heal-leveling. Chang, Yu-Ming;Chang, Yuan-Hao;Chen, Jian-Jia;Kuo, Tei-Wei;Li, Hsiang-Pang;Lue, Hang-Ting; Chang, Yu-Ming; Chang, Yuan-Hao; Chen, Jian-Jia; Kuo, Tei-Wei; Li, Hsiang-Pang; Lue, Hang-Ting; TEI-WEI KUO
國立交通大學 2019-04-02T06:04:53Z Study of Thyristor-Mode Dual-Channel NAND Flash Devices Lo, Roger; Lue, Hang-Ting; Chen, Weichen; Du, Pei-Ying; Hsu, Tzu-Hsuan; Hou, Tuo-Hung; Wang, Keh-Chung; Lu, Chih-Yuan
國立交通大學 2018-08-21T05:56:34Z Modeling the Variability Caused by Random Grain Boundary and Trap-location Induced Asymmetrical Read Behavior for a Tight-pitch Vertical Gate 3D NAND Flash Memory Using Double-Gate Thin-Film Transistor (TFT) Device Hsiao, Yi-Hsuan; Lue, Hang-Ting; Chen, Wei-Chen; Chen, Chih-Ping; Chang, Kuo-Ping; Shih, Yen-Hao; Tsui, Bing-Yue; Lu, Chih-Yuan
國立交通大學 2017-04-21T06:49:40Z STUDY OF GATE-INJECTION OPERATED SONOS-TYPE DEVICES USING THE GATE-SENSING AND CHANNEL-SENSING (GSCS) METHOD Du, Pei-Ying; Lue, Hang-Ting; Wang, Szu-Yu; Huang, Tiao-Yuan; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan
國立交通大學 2017-04-21T06:49:32Z Reliability Study of MANOS with and without a SiO2 Buffer Layer and BE-MANOS Charge-Trapping NAND Flash Devices Liao, Chien-Wei; Lai, Sheng-Chih; Lue, Hang-Ting; Yang, Ming-Jui; Shen, Chin-Yen; Lue, Yi-Hsien; Huang, Yu-Fong; Hsieh, Jung-Yu; Wang, Szu-Yu; Luo, Guang-Li; Chien, Chao-Hsin; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan
國立交通大學 2017-04-21T06:49:17Z A Study of Blocking and Tunnel Oxide Engineering on Double-Trapping (DT) BE-SONOS Performance Lo, Roger; Du, Pei-Ying; Hsu, Tzu-Hsuan; Wu, Chen-Jun; Guo, Jung-Yi; Cheng, Chun-Min; Lue, Hang-Ting; Shih, Yen-Hao; Hou, Tuo-Hung; Hsieh, Kuang-Yeu; Lu, Chih-Yuan
國立交通大學 2017-04-21T06:48:56Z An oxide-buffered BE-MANOS charge-trapping device and the role of Al2O3 Lai, Sheng-Chih; Lue, Hang-Ting; Liao, Chien-Wei; Huang, Yu-Fong; Yang, Ming-Jui; Lue, Yi-Hsien; Wu, Tai-Bor; Hsieh, Jung-Yu; Wang, Szu-Yu; Hong, Shih-Ping; Hsu, Fang-Hao; Shen, Chih-Yen; Luo, Guang-Li; Chien, Chao-Hsin; Hsieh, Kuan-Yeu; Liu, Rich; Lu, Chih-Yuan
國立交通大學 2017-04-21T06:48:54Z Highly reliable MA BE-SONOS (Metal-Al2O3 bandgap engineered SONOS) using a SiO2 buffer layer Lai, Sheng-Chih; Lue, Hang-Ting; Liao, Chien-Wei; Wu, Tai-Bor; Yang, Ming-Jui; Lue, Yi-Hsien; Hsieh, Jung-Yu; Wang, Szu-Yu; Luo, Guang-Li; Chien, Chao-Hsin; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan
國立交通大學 2015-12-02T02:59:28Z Ultra-High Bit Density 3D NAND Flash-Featuring-Assisted Gate Operation Hsiao, Yi-Hsuan; Lue, Hang-Ting; Chen, Wei-Chen; Tsui, Bing-Yue; Hsieh, Kuang-Yeu; Lu, Chih-Yuan

Showing items 1-10 of 17  (2 Page(s) Totally)
1 2 > >>
View [10|25|50] records per page