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"luo cheng wei"
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| 國立交通大學 |
2014-12-12T01:37:06Z |
多晶矽奈米線結合內嵌式奈米矽晶體之SONOS記憶體元件之研究
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羅正瑋; Luo, Cheng-Wei; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:52Z |
Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory Devices
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Luo, Cheng-Wei; Lin, Horng-Chih; Lee, Ko-Hui; Chen, Wei-Chen; Hsu, Hsing-Hui; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:12:04Z |
Impacts of Multiple-Gated Configuration on the Characteristics of Poly-Si Nanowire SONOS Devices
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Hsu, Hsing-Hui; Lin, Horng-Chih; Luo, Cheng-Wei; Su, Chun-Jung; Huang, Tiao-Yuan |
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