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Institution	Date	Title	Author
國立臺灣海洋大學	2011	A Low-Power 64-point Pipeline FFT/IFFT Processor for OFDM Applications	Chu Yu ; Mao-Hsu Yen ; Pao-Ann Hsiung ; Sao-Jie Chen
國立臺灣海洋大學	2011	Fast data access and energy-efficient protocol for wireless data broadcast.	Haw-Yun Shin;Mao-Hsu Yen;Chih-Cheng Tseng;Hung-Huan Liu
國立臺灣海洋大學	2010-12	Evaluating and Improving Variable Length History Branch Predictors	Yeong-Chang Maa;Mao-Hsu Yen;Yu-Tang Wang
國立臺灣海洋大學	2010-10-15	A Rearrangeable Hierarchical Interconnection Structure for FPGA Routing Resource	Mao-Hsu Yen;Bing-Kun Chan;Chun-Ran Huang;Chih-Hao Ting;Zheng-Yan Huang
國立臺灣海洋大學	2010-10	Implement an SDR Platform by Using GNU Radio and USRP	Mao-Hsu Yen;Chu Yu;Kuang-Yu Shie;Yu-Hsiang Huang;Jiun-Liang Lin
國立臺灣海洋大學	2010-10	Hedging Filter for Power Aware Branch Prediction	Yeong-Chang Maa;Mao-Hsu Yen;Shu-Ming Kuo;Guan-Luen Lee
國立臺灣海洋大學	2010-07	ARAL-CR: An Adaptive Reasoning And Learning Cognitive Radio Platform	Sao-Jie Chen;Pao-Ann Hsiung;Chu Yu;Mao-Hsu Yen;Sezer S.;Schulte M.;Yu-Hen Hu
國立臺灣海洋大學	2010-07	An Adaptive PID Controller	Jen-Yang Chen;Chuan-Hsi Liu;Chang-Wei Fan;Haw-Yun Shin;Mao-Hsu Yen
國立臺灣海洋大學	2010-06	Design of a Low Power Viterbi Decoder for Wireless Communication Applications	Chih-Jhen Chen; Chu Yu; Mao-Hsu Yen; Pao-Ann Hsiung; Sao-Jie Chen
國立臺灣海洋大學	2010	Improving Power Saving for Filter-Based Branch Target Buffer	Yeong-Chang Maa;Mao-Hsu Yen;Chun-Hung Wang;Guan-Luen Lee;Xumin Guo
國立臺灣海洋大學	2010	Wavefront Architecture for Computing the Dynamic Space Warping Algorithm	Mao-Hsu Yen;Yeong-Chang Maa;Bing-Kun Chan;Wei-Heng Chen;Chih-Hao Ting
國立臺灣海洋大學	2010	A Memoryless Viterbi Decoder for OFDM Systems	Chu Yu;Chih-Jhen Chen;Mao-Hsu Yen;Pao-Ann Hsiung;Sao-Jie Chen
國立臺灣海洋大學	2010	Design of a Low Power Viterbi Decoder for Wireless Communication Applications	Chih-Jhen Chen;Chu Yu;Mao-Hsu Yen;Pao-Ann Hsiung;Sao-Jie Chen
國立臺灣海洋大學	2010	Hierarchical Decoder for Filter-Based Low Power BTB	Yeong-Chang Maa;Mao-Hsu Yen;Chun-Hung Wang;Guan-Luen Lee;Xumin Guo
國立臺灣海洋大學	2010	Cost-effective branch prediction by combining hedging and filterin	Yeong-Chang Maa;Mao-Hsu Yen;Shu-Ming Kuo;Guan-Luen Lee
國立臺灣海洋大學	2009-07	Parallel Implementation of Convolution Encoder for Software Defined Radio on DSP Architecture	Jui-Chieh Lin;Chu Yu;Mao-Hsu Yen;Pao-Ann Hsiung;Sao-Jie Chen;Yu Hen Hu
國立臺灣海洋大學	2009-05	A 900 MHz to 5.2 GHz Dual-Loop Feedback Multi-band LNA	Jia-Wei Lin;Da-Tong Yen;Wei-Yi Hu;Chu Yu;Mao-Hsu Yen;Pao-Ann Hsiung;Sao-Jie Chen
國立臺灣海洋大學	2009-01	Design of a High-Speed Block Interleaving/Deinterleaving Architecture for Wireless Communication Applications	Chu Yu;Mao-Hsu Yen;Pao-Ann Hsiung;Sao-Jie Chen
國立臺灣海洋大學	2009	Low-Error Fixed-Width Modified Booth Multipliers	Chu Yu;Cheng-Hang Sung;Meng-Hsueh Chiang;Mao-Hsu Yen;Hwai-Tsu Hu
國立臺灣海洋大學	2008-10	SIMD-Wavefront Architecture for Computing the Dynamic Time Warping Algorithm	Mao-Hsu Yen;Yeong-Chang Maa;Chu Yu;Yi-Shan Chen;Yu-Hsiang Huang
國立臺灣海洋大學	2008	A Unified Block Interleaving/Deinterleaving Architecture for Wireless Communication Applications	Chu Yu;Mao-Hsu Yen;Pao-Ann Hsiung;Sao-Jie Chen
國立臺灣海洋大學	2008	A VLSI Architecture for Computing the Dynamic Space Warping Algorithm	Chun-Lung Wu;Chia-Yen Hsu;Yu-Hsiang Huang;Mao-Hsu Yen;Yeong-Chang Maa
國立臺灣海洋大學	2006	A Three-Stage Three-Sided Rearrangeable Switching Network for Interconnection Chip	Mao-Hsu Yen;Yeong-Chang Maa;Chin-Fa Hsieh;Shiuh-Chung Yi;
國立臺灣海洋大學	2001-11	A Three-stage One-sided Rearrangeable Polygonal Switching Network	Mao-Hsu Yen;Sao-Jie Chen;Sanko H. Lan
國立臺灣海洋大學	2001	Symmetric and Programmable Multi-Chip Module for Low-Power Prototyping System	Mao-Hsu Yen;Sao-Jie Chen;Sanko H. Lan

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