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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
中原大學 2010-05 A Design Partitioning Algorithm for Three Dimensional Integrated Circuits Hua-Sin Ye;Mely Chen Chi;Shih-Hsu Huang
中原大學 2009-08 Technology Remapping for Engineering Change with Wirelength Consideration Yung-Sheng Tseng;Yao-Kai Yeh;Mely Chen Chi;Tsai-Ming Hsieh
中原大學 2007 An Effective Obstacle-Avoiding Rectilinear Steiner Minimal Tree Construction in SOC Designs Yung Tai Chang;Ya Wen Tsai;Jun Cheng Chi;Mely Chen Chi
中原大學 2005-06-12 An Integrated Timing-Driven Partitioning, Floorplanning, and Placement System Mely Chen Chi;Jun Cheng Chi;Wen Chen Huang;Jei Ming Feng
中原大學 2004-04 Micro-Power Low-Offset Instrumentation Amplifier IC Design for Biomedical System Applications Chih-Jen Yen;Wen-Yaw Chung;Mely Chen Chi
中原大學 2004-04 Micro-Power Low-Offset Instrumentation Amplifier IC Design for Biomedical System Applications Chih-Jen Yen;Wen-Yaw Chung;Mely Chen Chi
中原大學 2001-03 A Practical Interconnect-Driven Design Methodology for Low Power ASIC Designs Shih-Hsu Huang;Mely Chen Chi;Hsu-Ming Hsiao
中原大學 2001 A Practical Interconnect-Driven Design Methodology For Low Power ASIC Designs Shih-Hsu Huang;Mely Chen Chi;Hsu-Ming Hsiao
中原大學 2000-09 A Reliable Clock Tree Design Methodology for ASIC Designs Mely Chen Chi;Shih-Hsu Huang
中原大學 2000 A Reliable Clock Tree Design Methodology for ASIC Designs Mely Chen Chi;Shih-Hsu Huang

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