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"ming han liao"???jsp.browse.items-by-author.description???
Showing items 91-100 of 117 (12 Page(s) Totally)
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| 臺大學術典藏 |
2020-01-13T08:22:37Z |
The reduction of keep-out zone (?10×) by the optimized novel trench structures near the through silicon vias for the application in 3-dimensional integrated circuits
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Liao, M.H.; MING-HAN LIAO |
| 臺大學術典藏 |
2020-01-13T08:22:36Z |
Erratum: The novel chamber hardware design to improve the thin film deposition quality in both 12? (300 mm) and 18? (450 mm) wafers with the development of 3D full chamber modeling and experimental visual technique; (AIP Advances (2013) 3:7 (072117))
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Liao, M.-H.; Chen, C.-H.; MING-HAN LIAO |
| 臺大學術典藏 |
2020-01-13T08:22:36Z |
Erratum to "Additional Nitrogen Ion-Implantation Treatment in STI to Relax the Intrinsic Compressive Stress for n-MOSFETs"
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Liao, M.-H.; Chen, C.H.; Chang, L.C.; Yang, C.; Kao, S.C.; MING-HAN LIAO |
| 臺大學術典藏 |
2020-01-13T08:22:36Z |
A non-linear analytic stress model for the analysis on the stress interaction between TSVs
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Liao, M.-H.; Kao, S.-C.; Huang, S.-J.; MING-HAN LIAO |
| 臺大學術典藏 |
2020-01-13T08:22:36Z |
Monolithic integration of GaN-based lightemitting diodes and metal-oxide-semiconductor field-effect transistors
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Lee, Y.-J.; Yang, Z.-P.; Chen, P.-G.; Hsieh, Y.-A.; Yao, Y.-C.; Liao, M.-H.; Lee, M.-H.; Wang, M.-T.; Hwang, J.-M.; MING-HAN LIAO |
| 臺大學術典藏 |
2020-01-13T08:22:36Z |
The special trench design near the through silicon vias (TSVs) to reduce the keep-out zone for application in three-dimensional integral circuits
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Liao, M.-H.; MING-HAN LIAO |
| 臺大學術典藏 |
2020-01-13T08:22:35Z |
Performance enhancement for the triboelectric energy harvester by using interfacial micro-dome array structures
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Liao, M.-H.; Huang, H.-Y.; Chuang, C.-C.; MING-HAN LIAO |
| 臺大學術典藏 |
2020-01-13T08:22:35Z |
In 0.18 Al 0.82 N/AlN/GaN MIS-HEMT on Si with Schottky-drain contact
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Chen, P.-G.; Tang, M.; Liao, M.-H.; Lee, M.H.; MING-HAN LIAO |
| 臺大學術典藏 |
2020-01-13T08:22:35Z |
Ge1 - XSix on Ge-based n-type metal-oxide semiconductor field-effect transistors by device simulation combined with high-order stress-piezoresistive relationships
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Lee, C.-C.; Hsieh, C.-P.; Huang, P.-C.; Cheng, S.-W.; Liao, M.-H.; MING-HAN LIAO |
| 臺大學術典藏 |
2020-01-13T08:22:35Z |
The demonstration of promising Ge n-type multi-gate-field-effect transistors with the magnetic FePt metal gate scheme
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Liao, M.-H.; Huang, S.C.; MING-HAN LIAO |
Showing items 91-100 of 117 (12 Page(s) Totally)
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