|
English
|
正體中文
|
简体中文
|
Total items :2815444
|
|
Visitors :
27390961
Online Users :
1222
Project Commissioned by the Ministry of Education Project Executed by National Taiwan University Library
|
|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"miyake y"
Showing items 1-2 of 2 (1 Page(s) Totally) 1 View [10|25|50] records per page
國立臺灣科技大學 |
2020 |
High-Precision PLL Delay Matrix with Overclocking and Double Data Rate for Accurate FPGA Time-to-Digital Converters
|
Chen, P.;Lan, J.-T.;Wang, R.-T.;My, Qui N.;Marquez, J.C.J.S.;Kajihara, S.;Miyake, Y. |
國立臺灣科技大學 |
2019 |
On-chip test clock validation using a time-to-digital converter in FPGAs
|
Miyake, Y.;Kajihara, S.;Chen, P. |
Showing items 1-2 of 2 (1 Page(s) Totally) 1 View [10|25|50] records per page
|