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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
臺大學術典藏 2020-06-29T01:20:11Z Fault Simulation and Test Pattern Generation for Cross-gate Defects in FinFET Circuits. Chen, Yo-Wei; Pan, Cheng-Sheng; Li, James Chien-Mo; CHIEN-MO LI; Ho, Yu-Hao; Chiang, Kuan-Ying; Chiang, Kuan-Ying;Ho, Yu-Hao;Chen, Yo-Wei;Pan, Cheng-Sheng;Li, James Chien-Mo
臺大學術典藏 2020-06-29T01:20:11Z Fault Simulation and Test Pattern Generation for Cross-gate Defects in FinFET Circuits. Chen, Yo-Wei; Pan, Cheng-Sheng; Li, James Chien-Mo; CHIEN-MO LI; Ho, Yu-Hao; Chiang, Kuan-Ying; Chiang, Kuan-Ying;Ho, Yu-Hao;Chen, Yo-Wei;Pan, Cheng-Sheng;Li, James Chien-Mo

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