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Showing items 1-10 of 13 (2 Page(s) Totally) 1 2 > >> View [10|25|50] records per page
國立成功大學 |
2022-07-22 |
以三閘極氮化鋁鎵/氮化鎵高電子遷移率電晶體研製氫氣感測器
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潘柏辰; Pan, Po-Cheng |
國立交通大學 |
2020-07-01T05:20:34Z |
On Closing the Gap Between Pre-simulation and Post-simulation Results in Nanometer Analog Layouts
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Pan, Po-Cheng; Huang, Hung-Wen; Huang, Chien-Chia; Patyal, Abhishek; Chen, Hung-Ming; Yang, Tsun-Yu |
國立交通大學 |
2019-10-05T00:09:42Z |
Late Breaking Results: An Efficient Learning-based Approach for Performance Exploration on Analog and RF Circuit Synthesis
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Pan, Po-Cheng; Huang, Chien-Chia; Chen, Hung-Ming |
國立交通大學 |
2019-04-02T06:04:30Z |
A Stochastic-Based Efficient Critical Area Extractor on Open Access Platform
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Chen, Bo-Zhou; Chen, Hung-Ming; Huang, Li-Da; Pan, Po-Cheng |
國立交通大學 |
2019-04-02T06:04:25Z |
Analog Placement with Current Flow and Symmetry Constraints using PCP-SP
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Patyal, Abhishek; Pan, Po-Cheng; Asha, K. A.; Chen, Hung-Ming; Chi, Hao-Yu; Liu, Chien-Nan |
國立交通大學 |
2018-08-21T05:56:55Z |
PAGE: Parallel Agile Genetic Exploration towards Utmost Performance for Analog Circuit Design
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Pan, Po-Cheng; Chen, Hung-Ming; Lin, Chien-Chih |
國立交通大學 |
2015-12-02T03:00:49Z |
An Automatic Synthesis Tool for Nanometer Low Dropout Regulator Using Simulation Based Model and Geometric Programming
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Hsu, Shih-Hsin; Chen, Wei-Zen; Zheng, Jui-Pin; Liu, Sean S. -Y.; Pan, Po-Cheng; Chen, Hung-Ming |
國立交通大學 |
2015-12-02T02:59:23Z |
A Fast Prototyping Framework for Analog Layout Migration With Planar Preservation
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Pan, Po-Cheng; Chin, Ching-Yu; Chen, Hung-Ming; Chen, Tung-Chieh; Lee, Chin-Chieh; Lin, Jou-Chun |
國立交通大學 |
2015-11-26T00:55:40Z |
敏捷類比電路合成與佈局設計遷移方法
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潘柏丞; Pan, Po-Cheng; 陳宏明; Chen, Hung-Ming |
國立交通大學 |
2014-12-08T15:34:50Z |
Efficient Analog Layout Prototyping by Layout Reuse with Routing Preservation
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Chin, Ching-Yu; Pan, Po-Cheng; Chen, Hung-Ming; Chen, Tung-Chieh; Lin, Jou-Chun |
Showing items 1-10 of 13 (2 Page(s) Totally) 1 2 > >> View [10|25|50] records per page
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