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Institution Date Title Author
國立交通大學 2014-12-08T15:38:39Z Investigation on device characteristics of MOSFET transistor placed under bond pad for high-pin-count SOC applications Ker, MD; Peng, JH
國立交通大學 2014-12-08T15:26:50Z ESD test methods on integrated circuits: An overview Ker, MD; Peng, JH; Jiang, HC
國立交通大學 2014-12-08T15:26:35Z Novel ESD implantation for sub-quarter-micron CMOS technology with enhanced machine-model ESD robustness Ker, MD; Hsu, HC; Peng, JH

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