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Showing items 41-44 of 44 (2 Page(s) Totally) << < 1 2 View [10|25|50] records per page
淡江大學 |
2002-08 |
A Novel BIST Response Analyzer Based on TLS
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Rau, Jiann-Chyi; Jone, Wen-Ben |
淡江大學 |
2001-08 |
The methods to construct imaging circuit for efficient VLSI circuit verification
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饒建奇; Rau, Jiann-chyi; Chen, Y. M.; Chang, S. C. |
淡江大學 |
2001-01 |
A timing driven pseudo exhaustive testing for VLSI circuits
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Chang, Shih-chieh; 饒建奇; Rau, Jiann-chyi |
淡江大學 |
2000-10 |
Tree-Structured LFSR synthesis scheme for pseudo-exhaustive testing of VLSI circuits
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Rau, Jiann-chyi; Jone, W.B.; Chang, S.C.; Wu, Y.L. |
Showing items 41-44 of 44 (2 Page(s) Totally) << < 1 2 View [10|25|50] records per page
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