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Showing items 1-8 of 8  (1 Page(s) Totally)
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Institution Date Title Author
國立成功大學 2022 Accurate Estimation of Test Pattern Counts for a Wide-Range of EDT Input/Output Channel Configurations Zheng, S.-X.;Yeh, C.-Y.;Lee, K.-J.;Wang, C.;Cheng, W.-T.;Kassab, M.;Rajski, J.;Reddy, S.M.
國立成功大學 2020 Generating Single-and Double-Pattern Tests for Multiple CMOS Fault Models in One ATPG Run Kung, Y.-C.;Lee, K.-J.;Reddy, S.M.
國立成功大學 2020 Prediction of Test Pattern Count and Test Data Volume for Scan Architectures under Different Input Channel Configurations Tsai, F.-J.;Ye, C.-S.;Lee, K.-J.;Zheng, S.-X.;Huang, Y.;Cheng, W.-T.;Reddy, S.M.;Kassab, M.;Rajski, J.;Wang, C.;Zawada, J.
國立成功大學 2020 Efficient Prognostication of Pattern Count with Different Input Compression Ratios Tsai, F.-J.;Ye, C.-S.;Huang, Y.;Lee, K.-J.;Cheng, W.-T.;Reddy, S.M.;Kassab, M.;Rajski, J.
國立成功大學 2020 Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels Tsai, F.-J.;Ye, C.-S.;Huang, Y.;Lee, K.-J.;Cheng, W.-T.;Reddy, S.M.;Kassab, M.;Rajski, J.;Zheng, S.-X.
國立成功大學 2019 An Efficient Diagnosis-Aware ATPG Procedure to Enhance Diagnosis Resolution and Test Compaction Wu, C.-H.;Lee, K.-J.;Reddy, S.M.
國立成功大學 2019 Generating Compact Test Patterns for DC and AC Faults Using One ATPG Run Kung, Y.-C.;Lee, K.-J.;Reddy, S.M.
國立成功大學 2017 Test generation for open and delay faults in CMOS circuits Wu, C.-H.;Lee, K.-J.;Reddy, S.M.

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