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國立交通大學 |
2020-10-05T02:02:23Z |
Sub-ns Access Sub-mW/GHz 32 Kb SRAM with 0.45 V Cross-Point-5T Cell and Built-in Y_Line
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Itoh, K.; Rong, B. D.; Chen, H. M.; Chen, P. H.; Jou, S. J.; Sato, K.; He, C. Y.; Tang, K. H.; Chen, T. S.; Chang, K. Y.; Lin, C. H. |
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