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Institution	Date	Title	Author
義守大學	2013-06	A nearly constant delay and low power VLSI design of a pipeline Reed–Solomon encoder for storage and communication systems	Chia-Sheng Wen;Yan-Haw Chen;Trieu-Kien Truong;Shen-Fu Hsiao
國立中山大學	2009-01	An 8.69 Mvertices/s 278 Mpixels/s Tile-based 3D Graphics SoC HW/SW Development for Consumer Electronics	Liang-Bi Chen;Ruei-Ting Gu;Wei-Sheng Huang;Chien-Chou Wang;Wen-Chi Shiue;Tsung-Yu Ho;Yun-Nan Chang;Shen-Fu Hsiao;Chung-Nan Lee;Ing-Jer Huang
國立中山大學	2009	具有即時效能/功率監控功能的高效率可程式化三維電腦繪圖晶片系統---軟硬體開發及整合---子計畫四：三維電腦繪圖晶片系統之Vertex Shader 處理器設計(III)	蕭勝夫;莊作彬; Shen-Fu Hsiao;Tso-Bing Juang
國立中山大學	2008-05	An Automatic Hardware Generator for Special Arithmetic Functions Using Various ROM-Based Approximation Approaches	Shen-Fu Hsiao; Ping-Chung Wei; Ching-Pin Lin
國立中山大學	2008-05	Area-Oriented Pass-Transistor Logic Synthesis Using Buffer Elimination and Layout Compaction	Shen-Fu Hsiao; Ming-Yu Tsai; Chia-Sheng Wen
國立中山大學	2008-04-23	An 8.69 Mvertices/s 278 Mpixels/s Tile-based 3D Graphics Full Pipeline with Embedded Performance Counting Module, Real-Time Bus Tracer and Protocol Checker for Consumer Electronics	Ruei-Ting Gu; Wei-Sheng Huang; Chien-Chou Wang; Wen-Chi Shiue; Tsung-Yu Ho; Chung-Hua Tsai; Tzu-Ching Tien; Da-Jing; Zhang-Jian; Sheng-Yu Chiu; Ing-Jer Huang; Yun-Nan Chang; Shen-Fu Hsiao; Sheng-Yu Chiu; Jin-Hua Hong; Chung-Nan Lee; Ming-Chao Chiang
國立中山大學	2008-04	Transistor Sizing and Layout Merging of Basic in Pass Transistor Logic Cell Library	Shen-Fu Hsiao; Ming-Yu Tsai; Chia-Sheng Wen
國立中山大學	2007-08	Multple-Input XOR/XNOR Circuit Design Using Pass-Transistor Logic and Its Application in Cryptography	Ming-Yu Tsai; Chia-Sheng Wen; Shen-Fu Hsiao
國立中山大學	2007-08	Performance Comparisons and Tradeoffs of Table-Based Arithmetic Function Evaluators	Ping-Chung Wei; Ching-Pin Lin; Shen-Fu Hsiao
國立中山大學	2007-06-20	A Low Cost Tile-based 3D Graphics Full Pipeline with Real-time Performance Monitoring Support for OpenGL ES in Consumer Electronics	Ruei-Ting Gu; Tse-Chen Yeh; Wei-Sheng Huang; Ting-Yun Huang; Chung-Hua Tsai; Chung-Nan Lee; Ming-Chao Chiang; Shen-Fu Hsiao; Yun-Nan Chang; Ing-Jer Huang
國立中山大學	2007	嵌入式晶片系統資料路徑設計之算術功能單元產生器(III)	蕭勝夫; Shen-Fu Hsiao
國立中山大學	2007	具有即時效能/功率監控功能的高效率可程式化三維電腦繪圖晶片系統-軟硬體開發及整合---子計畫四：三維電腦繪圖晶片系統之Vertex Shader 處理器設計(I)	蕭勝夫; Shen-Fu Hsiao; 莊作彬; Tso-Bing Juang
國立中山大學	2006-12	Integrated System Architecture Synthesis of Distributed Embedded Systems for Multimedia Applications	Jin-Lin Liu; Shiann-Rong Kuang; Shen-Fu Hsiao
國立中山大學	2006-12	An Automatic Cache Generator Based on Content-Addressable Memory	Shen-Fu Hsiao; Sze-Yun Lin; Tze-Chorng Cheng; Ming-Yu Tsai
國立中山大學	2006-12	Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits	Shen-Fu Hsiao; Ming-Yu Tsai; Chia-Sheng Wen
國立中山大學	2006-08	A 3D GrAPHICS SOC FOR DIGITAL TELEVISION	Ruei-Ting Gu; Tse-Chen Yeh; Ken-Yu Lin; Chih-Yuen Lee; Ting-Yun Huang; Chung-Hua Tsai; Chung-Nan Lee; Ming-Chao Chiang; Shen-Fu Hsiao; Yun-Nan Chang; Ing-Jer Huang
國立中山大學	2006-08	Design and Verification of a Platform-Based Low-Cost 3D Graphics Geometry Engine Using Area-Reduced Arithmetic Units	Shen-Fu Hsiao; Ting-Yuan Huang; Tze-Chieng Tieng
國立中山大學	2006-08	Novel Memory Organization and Circuit Designs for Efficient Data Access in Applications of 3D Graphics and Multimedia Coding	Shen-Fu Hsiao; Yo-Chi Chen; Ming-Yu Tsai; Tze-Chong Cheng
國立中山大學	2006-03	Memory-Free Low-Cost Designs of Advanced Encryption Standard Using Common Subexpression Elimination for Sub-functions in Transformations	Shen-Fu Hsiao;Ming-Chih Chen;Chia-Shin Tu
國立中山大學	2006	嵌入式晶片系統資料路徑設計之算術功能單元產生器(II)	蕭勝夫; Shen-Fu Hsiao
國立中山大學	2005-5	An Efficient Pass-Transistor-Logic Synthesizer Using Multiplexers and Inverters Only	Shen-Fu Hsiao; Ming-Yu Tsai; Ming-Chih Chen; Chia-Sheng Wen
國立中山大學	2005-10	System-on-Chip Implementation of the Whole Advanced Encryption Standard (AES) Processor Using Reduced XOR-based Sum-of-Product Operations	Shen-Fu Hsiao;Ming-Chih Chen;Ming-Yu Tsai;Chi-Chen Lin
國立中山大學	2005-09	Efficient Substructure Sharing Methods for Optimizing the Inner-Product Operations in Rijndael Advanced Encryption Standard	Shen-Fu Hsiao;Ming-Chih Chen
國立中山大學	2005-08	Efficient VLSI Implementations of Fast Multiplierless Approximated DCT using Parameterized Hardware Modules	Shen-Fu Hsiao;Yu-Hen Hu;Tso-Bing Juang;Chung-Han Lee
國立中山大學	2005-07	A Cell-Driven Multiplier Generator with Delay Optimization of Partial Products Compression and an Efficient Partition Technique for the Final Addition	Tso-Bing Juang;Shen-Fu Hsiao;Ming-Yu Tsai;Jeng-Hsiung Jan
國立中山大學	2005-06	Low-Error Carry-Free Fixed-Width Multipliers with Low-Cost Compensation Circuits	Tso-Bing Juang;Shen-Fu Hsiao
國立中山大學	2005	數位電視之三維(3D)圖形加速處理器之軟硬體技術及系統整合(I)	黃英哲; Ing-Jer Huang; 蕭勝夫; Shen-Fu Hsiao; 張雲南; Yun-Nan Chang; 李宗南; Chung-Nan Lee; 江明朝; Ming-Chao Chiang
國立中山大學	2004-12	Two Efficient Area Reduction Methods for Implementations of the Rijndael Advanced Encryption Standard	Shen-Fu Hsiao; Ming-Chih Chen
國立中山大學	2004-12	Low-error Carry-Free Fixed-Width Multipliers and Their Application to DCT/IDCT	Tso-Bing Juang; Shen-Fu Hsiao; Shiann-Rong Kuang; Ming-Yu Tsai
國立中山大學	2004-08	Para-CORDIC: Parallel CORDIC Rotation Algorithm	Tso-Bing Juang;Shen-Fu Hsiao;Ming-Yu Tsai
國立中山大學	2004-02	A Memory-Efficient and High-Speed Sine/Cosine Generator Based on Parallel CORDIC Rotations	Shen-Fu Hsiao;Yu-Hen Hu;Tso-Bing Juang
國立中山大學	2003-12	Efficient Substructure Sharing Method for the Forward and Inverse MixColumns Operations in Rijndael AES	Ming-Chih Chen; Shen-Fu Hsiao
國立中山大學	2003-12	Design of Fixed-Length Multipliers Using Radix-2 Signed-Digit Redundant Numbers	Tso-Bing Juang; Shen-Fu Hsiao; Ming-Yu Tsai
國立中山大學	2003-08	Architectural Optimization for the forward and Inverse MixColumn Operations in Rijndael AES	Ming-Chih Chen; Shen-Fu Hsiao; Ming-Yu Tsai
國立中山大學	2003-08	A ROM-Free CORDIC-Based Sine/Cosine Function Generator Based on Concurrently Predicted Rotation Directions	Shen-Fu Hsiao; Tso-Bing Juang
國立中山大學	2003-08	High-Radix Low-Complexity Architectures for Long-Length DCT Using Conventional Arithmetic and ROM-Based Distributed Arithmeti c	Shen-Fu Hsiao; Yu-Hen Hu
國立中山大學	2003-01	Design and Implementation of A Video-Oriented Network-Interface-Card System	Ming-Chih Chen; Shen-Fu Hsiao; Cheng-Hsien Yang
國立中山大學	2003	邏輯和算術運算單元之量子電路設計	蕭勝夫; Shen-Fu Hsiao
國立中山大學	2002-12	Partitioning Methodology of the Final Adder in a Tree Structure Parallel Multiplier Generator	Tso-Bing Juang; Jeng-Hsin Jan; Ming-Yu Tsai; Shen-Fu Hsiao
國立中山大學	2002-11	Design and Implementation of a High-Performance Video-Oriented Network-Interface-Card System	Ming-Chih Chen; Shen-Fu Hsiao; Cheng-Hsien Yang
國立中山大學	2002-09	Design and Implementation of a Specific Network-Interface-Card for Accelerating Video Delivery	Ming-Chih Chen; Shen-Fu Hsiao; Cheng-Hsien Yang
國立中山大學	2002-08	High-Performance Multiplexer-Based Logic Synthesis Using Pass-Transistor Logic	Shen-Fu Hsiao;Jia-Siang Yeh;Da-Yen Chen
國立中山大學	2002-08	High-Performance Logic Synthesis Based on Pass-Transistor Logic	Ming-Yu Tsai; Chia-Sheng Wen; Shen-Fu Hsiao
國立中山大學	2002-08	A High-Performance Function Generator for Multiplier-Based Arithmetic Operations	Tso-Bing Juang; Jeng-Hsin Jan; Ming-Yu Tsai; Shen-Fu Hsiao
國立中山大學	2002-08	Design and Implementation of a Video-Oriented Network-Interface-Card System	Ming-Chih Chen; Shen-Fu Hsiao; Cheng-Hsien Yang
國立中山大學	2002-04	New Matrix Formulation for Two-Dimensional DCT/IDCT Computation and Its Distributed-Memory VLSI Implementation	Shen-Fu Hsiao;Jian-Ming Tseng
國立中山大學	2002	以開關電晶體元件庫為主的邏輯合成器和佈局產生器	蕭勝夫; Shen-Fu Hsiao
國立中山大學	2002	單晶片封裝系統數位電視多重標準接收器設計與實作---子計畫IV：數位電視解碼器之數位信號處理及系統控制之軟硬體模組設計及實作	黃英哲; Ing-Jer Huang; 蕭勝夫; Shen-Fu Hsiao
國立中山大學	2001-11	A New Hardware-Efficient Algorithm and Architecture for Computation of 2-D DCT on a Linear Systolic Array	Shen-Fu Hsiao;Wei-Ren Shiue
國立中山大學	2001-09	Area-Efficient Carry-Save Full Adder Design Using Pass Transistors	Tso-Bing Juan; Ming-Ju Tsia; Shen-Fu Hsiao

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