English  |  正體中文  |  简体中文  |  Total items :2828147  
Visitors :  32102946    Online Users :  1253
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

"shih wei chiang"

Return to Browse by Author
Sorting by Title Sort by Date

Showing items 1-22 of 22  (1 Page(s) Totally)
1 
View [10|25|50] records per page

Institution Date Title Author
中山醫學大學 2018-05-07 Changes in sensorimotor-related thalamic diffusion properties and cerebrospinal fluid hydrodynamics predict gait responses to tap test in idiopathic normal-pressure hydrocephalus Ping-Huei Tsai; Yung-Chieh Chen; Shih-Wei Chiang; Teng-Yi Huang; Ming-Chung Chou; Hua-Shan Liu; Hsiao-Wen Chung; Giia-Sheun Peng; Hsin-I Ma; Hung-Wen Kao; Cheng-Yu Chen
中山醫學大學 2018-03-01 Histogram analysis of T2*-based pharmacokinetic imaging in cerebral glioma grading Hua Shan Liu; Shih Wei Chiang; Hsiao Wen Chung; Ping Huei Tsai; Fei Ting Hsu; Nai Yu Cho; Chao Ying Wang; Ming Chung Chou; Cheng Yu Chen
中山醫學大學 2017-02-03 Early white matter injuries in patients with acute carbon monoxide intoxication A tract-specific diffusion kurtosis imaging study and STROBE compliant article Ping-Huei Tsai; Ming-Chung Chou; Shih-Wei Chiang; Hsiao-Wen Chung; Hua-Shan Liu; Hung-Wen Kao; Cheng-Yu Chen
中山醫學大學 2015-12-18 Middle Cerebral Artery Calcification Association With Ischemic Stroke Hung-Wen Kao; Michelle Liou; Hsiao-Wen Chung; Hua-Shan Liu; Ping-Huei Tsai; Shih-Wei Chiang; Ming-Chung Chou; Giia-Sheun Peng; Guo-Shu Huang; Hsian-He Hsu; Cheng-Yu Chen
國立交通大學 2014-12-16T06:15:18Z LOW POWER STATIC RANDOM ACCESS MEMORY Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Hwang Wei; Chen Chia-Cheng; Shih Wei-Chiang
國立交通大學 2014-12-16T06:15:18Z STATIC RANDOM ACCESS MEMORY WITH DATA CONTROLLED POWER SUPPLY Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Lin Yung-Wei; Lu Chien-Yu; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Chen Chia-Cheng; Shih Wei-Chiang
國立交通大學 2014-12-16T06:15:17Z DATA-AWARE DYNAMIC SUPPLY RANDOM ACCESS MEMORY Chuang Ching-Te; Yang Hao-I; Lin Yi-Wei; Hwang Wei; Shih Wei-Chiang; Chen Chia-Cheng
國立交通大學 2014-12-16T06:15:17Z VARIATION-TOLERANT WORD-LINE UNDER-DRIVE SCHEME FOR RANDOM ACCESS MEMORY Chuang Ching-Te; Lin Yi-Wei; Chen Chia-Cheng; Shih Wei-Chiang
國立交通大學 2014-12-16T06:14:56Z SRAM based on 6 transistor structure including a first inverter, a second inverter, a first pass-gate transistor, and a second pass-gate transistor CHUANG Ching-Te; Jou Shyh-Jye; Hwang Wei; Lin Yi-Wei; Tsai Ming-Chien; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di
國立交通大學 2014-12-16T06:14:56Z Oscillator based on a 6T SRAM for measuring the Bias Temperature Instability Chuang Ching-Te; Jou Shyh-Jye; Hwang Wei; Tsai Ming-Chien; Lin Yi-Wei; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di
國立交通大學 2014-12-16T06:14:13Z Variation-tolerant word-line under-drive scheme for random access memory Chuang Ching-Te; Lin Yi-Wei; Chen Chia-Cheng; Shih Wei-Chiang
國立交通大學 2014-12-16T06:14:08Z Static random access memory with data controlled power supply Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Lin Yung-Wei; Lu Chien-Yu; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Chen Chia-Cheng; Shih Wei-Chiang
國立交通大學 2014-12-16T06:14:07Z Data-aware dynamic supply random access memory Chuang Ching-Te; Yang Hao-I; Lin Yi-Wei; Hwang Wei; Shih Wei-Chiang; Chen Chia-Cheng
國立交通大學 2014-12-16T06:13:57Z Threshold voltage measurement device Chuang Ching-Te; Jou Shyh-Jye; Lin Geng-Cing; Wang Shao-Cheng; Lin Yi-Wei; Tsai Ming-Chien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di; Chu Jyun-Kai
國立交通大學 2014-12-16T06:13:54Z Low power static random access memory Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Hwang Wei; Chen Chia-Cheng; Shih Wei-Chiang
國立交通大學 2014-12-16T06:13:49Z Oscillato based on a 6T SRAM for measuring the bias temperature instability Chuang Ching-Te; Jou Shyh-Jye; Hwang Wei; Tsai Ming-Chien; Lin Yi-Wei; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di
國立交通大學 2014-12-12T02:29:41Z 三次內插特性法於水利計算之評估研究 姜世偉; Shih-Wei Chiang; 楊錦釧; 蔡東霖; Jinn-Chuang Yang; Tung-Lin Tsai
國立交通大學 2014-12-08T15:35:45Z A 40nm 1.0Mb Pipeline 6T SRAM with Variation-Tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist Chang, Chi-Shin; Yang, Hao-I; Liao, Wei-Nan; Lin, Yi-Wei; Lien, Nan-Chun; Chen, Chien-Hen; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Tu, Ming-Hsien; Huang, Huan-Shun; Hu, Yong-Jyun; Kan, Paul-Sen; Cheng, Cheng-Yo; Wang, Wei-Chang; Wang, Jian-Hao; Lee, Kuen-Di; Chen, Chia-Cheng; Shih, Wei-Chiang
國立交通大學 2014-12-08T15:30:06Z High-Performance 0.6V V-MIN 55nm 1.0Mb 6T SRAM with Adaptive BL Bleeder Yang, Hao-I; Lin, Yi-Wei; Hsia, Mao-Chih; Lin, Geng-Cing; Chang, Chi-Shin; Chen, Yin-Nien; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Lien, Nan-Chun; Li, Hung-Yu; Lee, Kuen-Di; Shih, Wei-Chiang; Wu, Ya-Ping; Lee, Wen-Ta; Hsu, Chih-Chiang
國立交通大學 2014-12-08T15:30:06Z An All-Digital Bit Transistor Characterization Scheme for CMOS 6T SRAM Array Lin, Geng-Cing; Wang, Shao-Cheng; Lin, Yi-Wei; Tsai, Ming-Chien; Chuang, Ching-Te; Jou, Shyh-Jye; Lien, Nan-Chun; Shih, Wei-Chiang; Lee, Kuen-Di; Chu, Jyun-Kai
國立交通大學 2014-12-08T15:30:03Z Design and Implementation of Dynamic Word-Line Pulse Write Margin Monitor for SRAM Wang, Shao-Cheng; Lin, Geng-Cing; Lin, Yi-Wei; Tsai, Ming-Chien; Chiu, Yi-Wei; Jou, Shyh-Jye; Chuang, Ching-Te; Lien, Nan-Chun; Shih, Wei-Chiang; Lee, Kuen-Di; Chu, Jyun-Kai
國立交通大學 2014-12-08T15:21:19Z A High-Performance Low V(MIN) 55nm 512Kb Disturb-Free 8T SRAM with Adaptive VVSS Control Yang, Hao-I; Yang, Shih-Chi; Hsia, Mao-Chih; Lin, Yung-Wei; Lin, Yi-Wei; Chen, Chien-Hen; Chang, Chi-Shin; Lin, Geng-Cing; Chen, Yin-Nien; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Lien, Nan-Chun; Li, Hung-Yu; Lee, Kuen-Di; Shih, Wei-Chiang; Wu, Ya-Ping; Lee, Wen-Ta; Hsu, Chih-Chiang

Showing items 1-22 of 22  (1 Page(s) Totally)
1 
View [10|25|50] records per page