|
English
|
正體中文
|
简体中文
|
Total items :0
|
|
Visitors :
51985487
Online Users :
759
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
|
|
|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"shung cb"
Showing items 6-15 of 31 (4 Page(s) Totally)
1 2 3 4 > >>
View [10|25|50] records per page
| 國立交通大學 |
2014-12-08T15:48:45Z |
A combined channel assignment mechanism for hierarchical cellular systems
|
Lo, KR; Chang, CJ; Chang, C; Shung, CB |
| 國立交通大學 |
2014-12-08T15:46:43Z |
New serial architecture for the Berlekamp-Massey algorithm
|
Chang, HC; Shung, CB |
| 國立交通大學 |
2014-12-08T15:45:42Z |
Two systolic architectures for modular multiplication
|
Tsai, WC; Shung, CB; Wang, SJ |
| 國立交通大學 |
2014-12-08T15:44:50Z |
A QoS-guaranteed fuzzy channel allocation controller for hierarchical cellular systems
|
Lo, KR; Chang, CJ; Chang, C; Shung, CB |
| 國立交通大學 |
2014-12-08T15:44:35Z |
Delay-optimal technology mapping for hard-wired non-homogeneous FPGAs
|
Chuang, HH; Jou, JY; Shung, CB |
| 國立交通大學 |
2014-12-08T15:44:14Z |
A Reed-Solomon Product-Code (RS-PC) decoder chip for DVD applications
|
Chang, HC; Shung, CB; Lee, CY |
| 國立交通大學 |
2014-12-08T15:40:20Z |
A neural fuzzy resource manager for hierarchical cellular systems supporting multimedia services
|
Lo, KR; Chang, CJ; Shung, CB |
| 國立交通大學 |
2014-12-08T15:27:55Z |
FAULT-TOLERANT ARCHITECTURES FOR SHARED BUFFER MEMORY SWITCH
|
LIN, YF; SHUNG, CB |
| 國立交通大學 |
2014-12-08T15:27:49Z |
A HIGH SPEED REED-SOLOMON CODEC CHIP USING LOOKFORWARD ARCHITECTURE
|
CHANG, JY; SHUNG, CB |
| 國立交通大學 |
2014-12-08T15:27:38Z |
Accurate logic-level power simulation using glitch filtering and estimation
|
Tsai, WC; Shung, CB; Wang, DC |
Showing items 6-15 of 31 (4 Page(s) Totally)
1 2 3 4 > >>
View [10|25|50] records per page
|
