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Showing items 1-37 of 37 (1 Page(s) Totally)
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Institution	Date	Title	Author
南台科技大學	2006-12	An Alternative IFFT/FFT Hardware Structure for OFDM Implementations	陳順智; Shung-Chih Chen; 余兆棠; Chao-Tang Yu
南台科技大學	2006-12	An Alternative IFFT/FFT Hardware Structure for OFDM Implementations	陳順智; Shung-Chih Chen; 余兆棠; Chao-Tang Yu
南台科技大學	2005-12	A Fast Search Algorithm for Image Vector Quantization	陳順智; 余兆棠; 陳培殷; Shung-Chih Chen; Chao-Tang Yu; Pei-Yin Chen
南台科技大學	2005-12	An Improvement of Fast Search Algorithm for Vectorquantization	Ming-Chieh Chung; Shung-Chih Chen; Chao-Tang Yu; Pei-Yin Chen; 陳順智;余兆棠;陳培殷
南台科技大學	2004-12	A new IFFT/FFT hardware implementation structure for OFDM applications	Shung-Chih Chen; Chao-Tang Yu; Chia-Lian Tsai; Jing-Jou Tang; 陳順智 ;余兆棠;蔡甲連;唐經洲
南台科技大學	2004-12	A New IFFT/FFT Hardware Implementation Structure for OFDM Applications	Shung-Chih Chen; Chao-Tang Yu; Chia-Lian Tsai; Jing-Jou Tang; 陳順智; 余兆棠; 蔡甲連; 唐經洲
南台科技大學	2004-12	A new IFFT/FFT Hardware Implementation Structure for OFDM Applications	Shung-Chih Chen; Chao-Tang Yu; Chia-Lian Tsai; Jing-Jou Tang; 陳順智; 余兆棠; 蔡甲連; 唐經洲
南台科技大學	2004-11	On the Use of Multiplier Area Reduction Technique in FFT/IFFT OFDM Implementations	Shung-Chih Chen; Chao-Tang Yu; Chia-Lian Tsai; Jing-Jou Tang; 陳順智;唐經洲;余兆棠
南台科技大學	2004-11	On the Use of Multiplier Area Reduction Technique in FFT/IFFT OFDM Implementations	Shung-Chih Chen; Chao-Tang Yu; Chia-Lian Tsai; Jing-Jou Tang;陳順智; 唐經洲; 余兆棠
南台科技大學	2004-11	An Efficient VLSI Architecture of 1-D Lifting Discrete Wavelet Transform	Pei-Yin Chen; Shung-Chih Chen;陳順智
南台科技大學	2004-11	On the Use of Multiplier Area Reduction Technique in FFT/IFFT OFDM Implementations	Shung-Chih Chen; Chao-Tang Yu; Chia-Lian Tsai; Jing-Jou Tang; 陳順智; 唐經洲; 余兆棠
南台科技大學	2003-12	On the Use of Multiplier Area Reduction Technique in OFDM Implementations	Chao-Tang Yu; Shung-Chih Chen; Chia-Lian Tsai; Jing-Jou Tang
南台科技大學	2003-09	On the use of Multiplier Area Reduction Technique in OFDM Implementations	Chao-Tang Yu; Shung-Chih Chen; Chia-Lian Tsai; Jing-Jou Tang
南台科技大學	2003-08	An Efficient Defuzzification Method for Center-of-Gravity Computation	Shung-Chih Chen; Pei-Yin Chen; Ming-He Wang
南台科技大學	2003	A Flexible VLSI of Genetic Algorithm	Pei-Yin Chen; Shung-Chih Chen; Yung-Ming Wang
南台科技大學	2002-12	高效率可變長度碼編解碼演算法及其VLSI架構設計	陳培殷; Pei-Yin Chen; 陳順智; Shung-Chih Chen; 邵志勇; Chi-Yung Shao; 陳文鉅; Wen-Chu Chen
南台科技大學	2002-08	An Architecture of 2-D 3-level Lifting-based Discrete Wavelet Transform	陳順智;Shung-Chih Chen; Chung-Cheng Wu
南台科技大學	2002-02	A Scalable Architecture for Two-Dimensional Lifting-Based Discrete Wavelet Transform	陳順智;Shung-Chih Chen; Chung-Cheng Wu
南台科技大學	2000-02	A New Search Algorithm for Block Motion Estimation	Pei-Yin Chen; Shung-Chih Chen
南台科技大學	2000-02	Heuristic Block Distortion Measure in Block Motion Estimation	Shung-Chih Chen; Pei-Yin Chen
南台科技大學	1999-02	An Efficient Search Algorithm for Block-Matching Motion Estimation	Pei-Yin Chen; Jer Min Jou; Shung-Chih Chen
南台科技大學	1998-05	Fast Delay-Dependent Power Estimation of Large Combinational Circuits	Jer Min Jou; Shung-Chih Chen; Chih-Liang Wang; 陳順智
南台科技大學	1998-02	Efficient Diagnostic Fault Simulation Algorithm for Combinational Circuits	陳順智;Shung-Chih Chen
南台科技大學	1997-11	Serial Diagnostic Fault Simulation for Synchronous Sequential Circuits	Shung-Chih Chen; Jer-Min Jou;陳順智
南台科技大學	1997-03	Diagnostic Fault Simulation for Synchronous Sequential Circuits	Shung-Chih Chen; Jer Min Jou;陳順智
南台科技大學	1996-08	Hierarchical Power Estimation of Digital Circuits	Jer Min Jou; R, -H, Hung; Shung-Chih Chen
南台科技大學	1996-04	A Fast Combinational Fault Simulation Algorithm	Shung-Chih Chen; 陳順智
南台科技大學	1995-05	Distributed Diagnostic Fault Simulation for Synchronous Sequential Circuits by Dynamic Fault Partitioning	Jer Min Jou; Shung-Chih Chen; 陳順智
南台科技大學	1994-06	A New Fault Simulator for Large Synchronous Sequential Circuits	Jer Min Jou; Shung-Chih Chen; 陳順智
南台科技大學	1994-06	An Improved Diagnostic Fault Simulation for Sequential Circuits	Jer Min Jou; Shung-Chih Chen; 陳順智
南台科技大學	1994-06	Efficient diagnostic fault simulation for sequential circuits	Jer Min Jou; Shung-Chih Chen; 孫建明;陳順智
南台科技大學	1994-05	A Super Fast and Memory Efficient Diagnostic Simulation Algorithm for Combinational Circuits	Jer Min Jou; Shung-Chih Chen; Ren-Der Chen; 陳順智
南台科技大學	1994-04	A Fast and Memory-Efficient Diagnostic Fault Simulation for Sequential Circuits	Jer Min Jou; Shung-Chih Chen; 孫建明;陳順智
南台科技大學	1993-05	PARCRIPT: a very fast combinational fault simulator	Jer Min Jou; Shung-Chih Chen; 孫建明;陳順智
南台科技大學	1992-03	An Efficient VHDL Simulator with Two-Simulation-Run Ability	Jer Min Jou; Shung-Chih Chen
南台科技大學	1992-01	MASS: An Integrated Approach to High Level Synthesis	Jer Min Jou; S. R. Kuang; Shung-Chih Chen
南台科技大學	1991-12	An Efficient Mixed-level VHDL Simulator with Robust Debugging Capability	Jer Min Jou; Shung-Chih Chen

Showing items 1-37 of 37 (1 Page(s) Totally)
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