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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"su ke wei"的相關文件
顯示項目 1-7 / 7 (共1頁)
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| 國立交通大學 |
2014-12-08T15:15:28Z |
Modeling the well-edge proximity effect in highly scaled MOSFETs
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Sheu, Yi-Ming; Su, Ke-Wei; Tian, Shiyang; Yang, Sheng-Jier; Wang, Chih-Chiang; Chen, Ming-Jer; Liu, Sally |
| 國立交通大學 |
2014-12-08T15:12:40Z |
Investigation of anomalous inversion C-V characteristics for long-channel MOSFETs with leaky dielectrics: Mechanisms and reconstruction
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Lee, Wei; Su, Pin; Su, Ke-Wei; Chiang, Chung-Shi; Liu, Sally |
| 國立交通大學 |
2014-12-08T15:06:23Z |
Investigation of inversion capacitance-voltage reconstruction for metal oxide semiconductor field effect transistors with leaky dielectrics using BSIM4/SPICE and intrinsic input resistance model
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Lee, Wei; Su, Pin; Su, Ke-Wei; Chiang, Chung-Shi; Liu, Sally |
| 國立臺灣大學 |
2006-10 |
Analysis of the Gate–Source/Drain Capacitance Behavior of a Narrow-Channel FD SOI NMOS Device Considering the 3-D Fringing Capacitances Using 3-D Simulation
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Chen, Chien-Chung; Kuo, James B.; Su, Ke-Wei; Liu, Sally |
| 臺大學術典藏 |
2006-10 |
Analysis of the Gate–Source/Drain Capacitance Behavior of a Narrow-Channel FD SOI NMOS Device Considering the 3-D Fringing Capacitances Using 3-D Simulation
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Chen, Chien-Chung; Kuo, James B.; Su, Ke-Wei; Liu, Sally; Chen, Chien-Chung; Kuo, James B.; Su, Ke-Wei; Liu, Sally |
| 國立臺灣大學 |
2006 |
Gate capacitances behavior of nanometer FD SOI CMOS devices with HfO2 high-k gate dielectric considering vertical and fringing displacement effects using 2-D Simulation
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Lin, Yu-Sheng; Lin, Chia-Hong; Kuo, J.B.; Su, Ke-Wei |
| 國立臺灣大學 |
2006 |
Analysis of the gate-source/drain capacitance behavior of a narrow-channel FD SOI NMOS device considering the 3-D fringing capacitances using 3-D simulation
|
Chen, Chien-Chung; Kuo, J.B.; Su, Ke-Wei; Liu, Sally |
顯示項目 1-7 / 7 (共1頁)
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