| 國立交通大學 |
2014-12-13T10:41:05Z |
源/汲極串聯電阻引致對高度微縮金氧半元件汲極電流不匹配及變異之反饋效應研究
|
蘇彬; Su Pin |
| 國立交通大學 |
2014-12-13T10:31:50Z |
次100奈米SOI CMOS的RF/Analog特性分析與模式建立(I)
|
蘇彬; Su Pin |
| 國立交通大學 |
2014-12-13T10:31:32Z |
一個用於部分與完全解離絕緣矽電路模擬的統整元件模型---65奈米SOI CMOS基體源極內建能障降低的探討
|
蘇彬; Su Pin |
| 國立交通大學 |
2014-12-13T10:30:21Z |
次100奈米SOI CMOS的RF/Analog特性分析與模式建立(II)
|
蘇彬; Su Pin |
| 國立交通大學 |
2014-12-13T10:29:57Z |
次50奈米Multiple-Gate SOI CMOS的特性分析與模式建立
|
蘇彬; Su Pin |
| 國立交通大學 |
2014-12-12T02:45:23Z |
鰭狀、穿隧場效電晶體和異質通道三維積體超薄層元件於超低功耗靜態隨機存取記憶體和邏輯電路之設計與分析
|
范銘隆; Fan, Ming-Long; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-12T02:45:17Z |
三五族碎能隙異質接面穿隧式場效電晶體之隨機變易特性的模擬與探討
|
徐誌緯; Hsu, Chie-Wei; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-12T02:38:10Z |
藉由三維沃爾洛伊圖對於隨機晶格邊界在可堆疊NAND記憶體造成的變異特性之模擬與分析
|
楊青維; Yang, Ching-Wei; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-12T02:26:31Z |
矽奈米尺寸金氧半場效電晶體的載子傳輸與重要元件參數之實驗性的研究
|
李維; Lee, Wei; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-12T01:46:22Z |
量子侷限效應對超薄絕緣鍺與砷化銦鎵金氧半場效電晶體的次臨界與後端閘極偏壓調變臨界電壓特性之理論研究
|
余昌鴻; Yu, Chang-Hung; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-12T01:27:05Z |
矽奈米線生物感測器之分析與模擬
|
呂昆諺; Lu,Kun-Yen; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-12T01:24:36Z |
先進CMOS元件結構的解析模型建立－量子侷限效應及製程變異敏感度之探討
|
吳育昇; Wu, Yu-Sheng; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-12T01:24:36Z |
矽奈米金氧半場效電晶體之汲極電流匹配與低頻雜訊研究及分析
|
郭俊延; Kuo, Jyun-Yan Jack; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-12T01:22:36Z |
單軸應變矽奈米尺寸金氧半場效電晶體對於載子遷移率之各種散射機制的實驗性研究
|
陳柏年; Chen, Po-Nien; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-12T01:22:36Z |
先進金氧半場效電晶體考慮溫度相依之高頻小訊號及雜訊特性分析
|
王生圳; Wang, Sheng-Chun; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-12T01:22:33Z |
超薄層矽及鍺通道元件、邏輯電路及靜態隨機存取記憶體之研究與分析
|
胡璧合; Hu, Pi-Ho; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-08T15:48:22Z |
Temperature-Dependent RF Small-Signal and Noise Characteristics of SOI Dynamic Threshold Voltage MOSFETs
|
Wang, Sheng-Chun; Su, Pin; Chen, Kun-Ming; Liao, Kuo-Hsiang; Chen, Bo-Yuan; Huang, Sheng-Yi; Hung, Cheng-Chou; Huang, Guo-Wei |
| 國立交通大學 |
2014-12-08T15:48:17Z |
A Comprehensive Study of Single-Electron Effects in Multiple-Gate MOSFETs
|
Lee, Wei; Su, Pin |
| 國立交通大學 |
2014-12-08T15:40:43Z |
Radio-Frequency Small-Signal and Noise Modeling for Silicon-on-Insulator Dynamic Threshold Voltage Metal-Oxide-Semiconductor Field-Effect Transistors
|
Wang, Sheng-Chun; Su, Pin; Chen, Kun-Ming; Huang, Sheng-Yi; Hung, Cheng-Chou; Huang, Guo-Wei |
| 國立交通大學 |
2014-12-08T15:38:27Z |
Evaluation of Static Noise Margin and Performance of 6T FinFET SRAM Cells with Asymmetric Gate to Source/Drain Underlap Devices
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:38:26Z |
Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs
|
Hsieh, Chien-Yu; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:38:25Z |
Impact of Surface Orientation on the Sensitivity of FinFETs to Process Variations-An Assessment Based on the Analytical Solution of the Schrodinger Equation
|
Wu, Yu-Sheng; Su, Pin |
| 國立交通大學 |
2014-12-08T15:38:05Z |
Impact of Quantum Confinement on Short-Channel Effects for Ultrathin-Body Germanium-on-Insulator MOSFETs
|
Wu, Yu-Sheng; Hsieh, Hsin-Yuan; Hu, Vita Pi-Ho; Su, Pin |
| 國立交通大學 |
2014-12-08T15:37:33Z |
Experimental Investigation of Surface-Roughness-Limited Mobility in Uniaxial Strained pMOSFETs
|
Chen, William P. N.; Kuo, Jack J. Y.; Su, Pin |
| 國立交通大學 |
2014-12-08T15:36:58Z |
Stability and Performance Optimization of Heterochannel Monolithic 3-D SRAM Cells Considering Interlayer Coupling
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:50Z |
Built-in Effective Body-Bias Effect in Ultra-Thin-Body Hetero-Channel III-V-on-Insulator n-MOSFETs
|
Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2014-12-08T15:36:16Z |
Analysis of Ultra-Thin-Body SOI Subthreshold SRAM Considering Line-Edge Roughness, Work Function Variation, and Temperature Sensitivity
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:11Z |
FinFET SRAM Cell Optimization Considering Temporal Variability due to NBTI/PBTI and Surface Orientation
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Hsieh, Chien-Yu; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:35:55Z |
Investigation of Backgate-Bias Dependence of Threshold-Voltage Sensitivity to Process and Temperature Variations for Ultra-Thin-Body Hetero-Channel MOSFETs
|
Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2014-12-08T15:35:52Z |
Single-trap-induced random telegraph noise for FinFET, Si/Ge Nanowire FET, Tunnel FET, SRAM and logic circuits
|
Fan, Ming-Long; Yang, Shao-Yu; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:35:20Z |
Simulation and Investigation of Random Grain-Boundary-Induced Variabilities for Stackable NAND Flash Using 3-D Voronoi Grain Patterns
|
Yang, Ching-Wei; Su, Pin |
| 國立交通大學 |
2014-12-08T15:35:18Z |
Impacts of Single Trap Induced Random Telegraph Noise on Si and Ge Nanowire FETs, 6T SRAM Cells and Logic Circuits
|
Yang, Shao-Yu; Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Analysis of Germanium FinFET Logic Circuits and SRAMs with Asymmetric Gate to Source/Drain Underlap Devices
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Source/Drain Series Resistance Induced Feedback Effect on Drain Current Mismatch and Its Implication
|
Kuo, Jack J. -Y.; Fan, Ming-Long; Lee, Wei; Su, Pin |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Design and Optimization of 6T SRAM using Vertically Stacked Nanowire MOSFETs
|
Tsai, Ming-Fu; Fan, Ming-Long; Pao, Chia-Hao; Chen, Yin-Nien; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:20Z |
Comparative Leakage Analysis of GeOI FinFET and Ge Bulk FinFET
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:12Z |
Investigation of Single-Trap-Induced Random Telegraph Noise for Tunnel FET Based Devices, 8T SRAM Cell, and Sense Amplifiers
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:12Z |
Device Design and Analysis of Logic Circuits and SRAMs for Germanium FinFETs on SOI and Bulk Substrates
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:31:13Z |
Threshold Voltage Design of UTB SOI SRAM With Improved Stability/Variability for Ultralow Voltage Near Subthreshold Operation
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:35Z |
Analysis of Single-Trap-Induced Random Telegraph Noise and its Interaction With Work Function Variation for Tunnel FET
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nein; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:30Z |
Threshold Voltage Design and Performance Assessment of Hetero-Channel SRAM Cells
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:25Z |
Design and Analysis of Robust Tunneling FET SRAM
|
Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:22Z |
Investigation and Comparison of Work Function Variation for FinFET and UTB SOI Devices Using a Voronoi Approach
|
Chou, Shao-Heng; Fan, Ming-Long; Su, Pin |
| 國立交通大學 |
2014-12-08T15:30:04Z |
Variation Tolerant CLSAs for Nanoscale Bulk-CMOS and FinFET SRAM
|
Tsai, Ming-Fu; Tsai, Jen-Huan; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:03Z |
A Comprehensive Comparative Analysis of FinFET and Trigate Device, SRAM and Logic Circuits
|
Pao, Chia-Hao; Fan, Ming-Long; Tsai, Ming-Fu; Chen, Yin-Nien; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:29:40Z |
Variability Analysis of Sense Amplifier for FinFET Subthreshold SRAM Applications
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:28:05Z |
Impacts of Random Telegraph Noise on FinFET Devices, 6T SRAM cell, and Logic Circuits
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:25:22Z |
Quantum Confinement Effect in Short-Channel Gate-All-Around MOSFETs and Its Impact on the Sensitivity of Threshold Voltage to Process Variations
|
Wu, Yu-Sheng; Su, Pin |
| 國立交通大學 |
2014-12-08T15:25:21Z |
Investigation of Static Noise Margin of FinFET SRAM Cells in Sub-threshold Region
|
Fan, Ming-Long; Wu, Yu-Sheng; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:25:09Z |
Temperature Dependences of RF Small-Signal Characteristics for the SOI Dynamic Threshold Voltage MOSFET
|
Wang, Sheng-Chun; Su, Pin; Chen, Kun-Ming; Huang, Sheng-Yi; Hung, Cheng-Chou; Huang, Guo-Wei |
