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Taiwan Academic Institutional Repository >
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"su pin"
Showing items 191-199 of 199 (20 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:07:33Z |
Investigation of Switching-Time Variations for Nanoscale MOSFETs Using the Effective-Drive-Current Approach
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Wu, Yu-Sheng; Fan, Ming-Long; Su, Pin |
| 國立交通大學 |
2014-12-08T15:07:17Z |
Investigation and Analysis of Mismatching Properties for Nanoscale Strained MOSFETs
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Kuo, Jack Jyun-Yan; Chen, William Po-Nien; Su, Pin |
| 國立交通大學 |
2014-12-08T15:07:04Z |
Comprehensive Noise Characterization and Modeling for 65-nm MOSFETs for Millimeter-Wave Applications
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Wang, Sheng-Chun; Su, Pin; Chen, Kun-Ming; Liao, Kuo-Hsiang; Chen, Bo-Yuan; Huang, Sheng-Yi; Hung, Cheng-Chou; Huang, Guo-Wei |
| 國立交通大學 |
2014-12-08T15:06:58Z |
Impact of Process-Induced Uniaxial Strain on the Temperature Dependence of Carrier Mobility in Nanoscale pMOSFETs
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Chen, William P. N.; Kuo, Jack J. Y.; Su, Pin |
| 國立交通大學 |
2014-12-08T15:06:58Z |
Enhanced Carrier-Mobility-Fluctuation Origin Low-Frequency Noise in Uniaxial Strained PMOSFETs
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Kuo, Jack J. -Y.; Chen, William P. -N.; Su, Pin |
| 國立交通大學 |
2014-12-08T15:06:44Z |
Investigation of Cell Stability and Write Ability of FinFET Subthreshold SRAM Using Analytical SNM Model
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Fan, Ming-Long; Wu, Yu-Sheng; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:06:23Z |
Investigation of inversion capacitance-voltage reconstruction for metal oxide semiconductor field effect transistors with leaky dielectrics using BSIM4/SPICE and intrinsic input resistance model
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Lee, Wei; Su, Pin; Su, Ke-Wei; Chiang, Chung-Shi; Liu, Sally |
| 國立交通大學 |
2014-12-08T15:04:22Z |
Investigation of Channel Backscattering Characteristics for Nanoscale SOI MOSFETs Using a New Temperature-Dependent Method
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Lee, Wei; Su, Pin |
| 國立交通大學 |
2014-12-08T15:01:50Z |
Investigation of Electrostatic Integrity for Ultra-Thin-Body GeOI MOSFET Using Analytical Solution of Poisson's Equation
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Hu, Vita Pi-Ho; Wu, Yu-Sheng; Su, Pin |
Showing items 191-199 of 199 (20 Page(s) Totally)
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