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Showing items 116-140 of 199 (8 Page(s) Totally)
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| 國立交通大學 |
2014-12-12T01:22:33Z |
超薄層矽及鍺通道元件、邏輯電路及靜態隨機存取記憶體之研究與分析
|
胡璧合; Hu, Pi-Ho; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-08T15:48:22Z |
Temperature-Dependent RF Small-Signal and Noise Characteristics of SOI Dynamic Threshold Voltage MOSFETs
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Wang, Sheng-Chun; Su, Pin; Chen, Kun-Ming; Liao, Kuo-Hsiang; Chen, Bo-Yuan; Huang, Sheng-Yi; Hung, Cheng-Chou; Huang, Guo-Wei |
| 國立交通大學 |
2014-12-08T15:48:17Z |
A Comprehensive Study of Single-Electron Effects in Multiple-Gate MOSFETs
|
Lee, Wei; Su, Pin |
| 國立交通大學 |
2014-12-08T15:40:43Z |
Radio-Frequency Small-Signal and Noise Modeling for Silicon-on-Insulator Dynamic Threshold Voltage Metal-Oxide-Semiconductor Field-Effect Transistors
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Wang, Sheng-Chun; Su, Pin; Chen, Kun-Ming; Huang, Sheng-Yi; Hung, Cheng-Chou; Huang, Guo-Wei |
| 國立交通大學 |
2014-12-08T15:38:27Z |
Evaluation of Static Noise Margin and Performance of 6T FinFET SRAM Cells with Asymmetric Gate to Source/Drain Underlap Devices
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:38:26Z |
Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs
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Hsieh, Chien-Yu; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:38:25Z |
Impact of Surface Orientation on the Sensitivity of FinFETs to Process Variations-An Assessment Based on the Analytical Solution of the Schrodinger Equation
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Wu, Yu-Sheng; Su, Pin |
| 國立交通大學 |
2014-12-08T15:38:05Z |
Impact of Quantum Confinement on Short-Channel Effects for Ultrathin-Body Germanium-on-Insulator MOSFETs
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Wu, Yu-Sheng; Hsieh, Hsin-Yuan; Hu, Vita Pi-Ho; Su, Pin |
| 國立交通大學 |
2014-12-08T15:37:33Z |
Experimental Investigation of Surface-Roughness-Limited Mobility in Uniaxial Strained pMOSFETs
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Chen, William P. N.; Kuo, Jack J. Y.; Su, Pin |
| 國立交通大學 |
2014-12-08T15:36:58Z |
Stability and Performance Optimization of Heterochannel Monolithic 3-D SRAM Cells Considering Interlayer Coupling
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:50Z |
Built-in Effective Body-Bias Effect in Ultra-Thin-Body Hetero-Channel III-V-on-Insulator n-MOSFETs
|
Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2014-12-08T15:36:16Z |
Analysis of Ultra-Thin-Body SOI Subthreshold SRAM Considering Line-Edge Roughness, Work Function Variation, and Temperature Sensitivity
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:11Z |
FinFET SRAM Cell Optimization Considering Temporal Variability due to NBTI/PBTI and Surface Orientation
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Hu, Vita Pi-Ho; Fan, Ming-Long; Hsieh, Chien-Yu; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:35:55Z |
Investigation of Backgate-Bias Dependence of Threshold-Voltage Sensitivity to Process and Temperature Variations for Ultra-Thin-Body Hetero-Channel MOSFETs
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Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2014-12-08T15:35:52Z |
Single-trap-induced random telegraph noise for FinFET, Si/Ge Nanowire FET, Tunnel FET, SRAM and logic circuits
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Fan, Ming-Long; Yang, Shao-Yu; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:35:20Z |
Simulation and Investigation of Random Grain-Boundary-Induced Variabilities for Stackable NAND Flash Using 3-D Voronoi Grain Patterns
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Yang, Ching-Wei; Su, Pin |
| 國立交通大學 |
2014-12-08T15:35:18Z |
Impacts of Single Trap Induced Random Telegraph Noise on Si and Ge Nanowire FETs, 6T SRAM Cells and Logic Circuits
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Yang, Shao-Yu; Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Analysis of Germanium FinFET Logic Circuits and SRAMs with Asymmetric Gate to Source/Drain Underlap Devices
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Source/Drain Series Resistance Induced Feedback Effect on Drain Current Mismatch and Its Implication
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Kuo, Jack J. -Y.; Fan, Ming-Long; Lee, Wei; Su, Pin |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Design and Optimization of 6T SRAM using Vertically Stacked Nanowire MOSFETs
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Tsai, Ming-Fu; Fan, Ming-Long; Pao, Chia-Hao; Chen, Yin-Nien; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:20Z |
Comparative Leakage Analysis of GeOI FinFET and Ge Bulk FinFET
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:12Z |
Investigation of Single-Trap-Induced Random Telegraph Noise for Tunnel FET Based Devices, 8T SRAM Cell, and Sense Amplifiers
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:12Z |
Device Design and Analysis of Logic Circuits and SRAMs for Germanium FinFETs on SOI and Bulk Substrates
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:31:13Z |
Threshold Voltage Design of UTB SOI SRAM With Improved Stability/Variability for Ultralow Voltage Near Subthreshold Operation
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:35Z |
Analysis of Single-Trap-Induced Random Telegraph Noise and its Interaction With Work Function Variation for Tunnel FET
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nein; Su, Pin; Chuang, Ching-Te |
Showing items 116-140 of 199 (8 Page(s) Totally)
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