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Showing items 1-15 of 15  (1 Page(s) Totally)
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Institution Date Title Author
元智大學 Jun-16 Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays 陳勇志; Ching-Yi Huang; Yun-Jui Li; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學 Jun-16 Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays 陳勇志; Ching-Yi Huang; Yun-Jui Li; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學 Dec-15 Synthesis for Width Minimization in the Single-Electron Transistor Array 陳勇志; Chian-Wei Liu; Chang-En Chiang; Ching-Yi Huang; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學 Dec-15 Synthesis for Width Minimization in the Single-Electron Transistor Array 陳勇志; Chian-Wei Liu; Chang-En Chiang; Ching-Yi Huang; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學 Apr-17 Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays 陳勇志; Yun-Jui Li; Ching-Yi Huang; Chia-Cheng Wu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學 2015-01-19 A Defect-aware Approach for Mapping Reconfigurable Single-Electron Transistor Arrays 陳勇志; Ching-Yi Huang; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學 2015-01-19 A Defect-aware Approach for Mapping Reconfigurable Single-Electron Transistor Arrays 陳勇志; Ching-Yi Huang; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學 2014-03-24 Width Minimization in the Single-Electron Transistor Array Synthesis 陳勇志; Chian-Wei Liu; Chang-En Chiang; Ching-Yi Huang; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學 2013-03-18 On Reconfigurable Single-Electron Transistor Arrays Synthesis Using Reordering Techniques 陳勇志; Chang-En Chiang; Li-Fu Tang; Chun-Yao Wang; Ching-Yi Huang; Suman Datta; Vijaykrishnan Narayanan
元智大學 2013-03-18 On Reconfigurable Single-Electron Transistor Arrays Synthesis Using Reordering Techniques 陳勇志; Chang-En Chiang; Li-Fu Tang; Chun-Yao Wang; Ching-Yi Huang; Suman Datta; Vijaykrishnan Narayanan
元智大學 2013-02 A Synthesis Algorithm for Reconfigurable Single-Electron Transistor Arrays 陳勇志; SOUMYA EACHEMPATI; CHUN-YAO WANG; SUMAN DATTA; YUAN XIE; VIJAYKRISHNAN NARAYANAN
元智大學 2008-04 RF and logic performance improvement of In0.7Ga0.3 As/InAs/In0.7Ga0.3As composite-channel HEMT using gate-sinking technology 許恒通; Chien-I Kuo; Edward Yi Chang; Chia-Yuan Chang; Yasuyuki Miyamoto; Suman Datta; Marko Radosavljevic; Guo-Wei Huang; Ching-Ting Lee
元智大學 2008-04 RF and logic performance improvement of In0.7Ga0.3 As/InAs/In0.7Ga0.3As composite-channel HEMT using gate-sinking technology 許恒通; Chien-I Kuo; Edward Yi Chang; Chia-Yuan Chang; Yasuyuki Miyamoto; Suman Datta; Marko Radosavljevic; Guo-Wei Huang; Ching-Ting Lee
元智大學 2007-10 Investigation of impact ionization in InAs-channel HEMT for high-speed and low-power applications 許恒通; Chia-Yuan Chang; Edward Yi Chang; Chien-I Kuo; Suman Datta; Marko Radosavljevic; Yasuyuki Miyamoto; Guo-Wei Huang
元智大學 2007-10 Investigation of impact ionization in InAs-channel HEMT for high-speed and low-power applications 許恒通; Chia-Yuan Chang; Edward Yi Chang; Chien-I Kuo; Suman Datta; Marko Radosavljevic; Yasuyuki Miyamoto; Guo-Wei Huang

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