臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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"sung min lin"

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Institution	Date	Title	Author
南台科技大學	2007	64-Bit High-Speed Asynchronous Comparator	Jung-Lin Yang; Wei-Peng Teng; Sung-Min Lin
南台科技大學	2006-12	Adjustable Extremely Low Power Delay Line	Jung-Lin Yang; Chih-Wei Chao; Sung-Min Lin
南台科技大學	2006-11	High-Level Synthesis for Self-Timed Systems	Jung-Lin Yang; Hsu-Ching Tien; Chia-Ming Hsu; Sung-Min Lin; 楊榮林;田旭清;許家銘;林嵩閔
南台科技大學	2006-11	Pseudo-DCVSL Template for Power Awarenss VLSI Circuit Design	Jung-Ling Yang; Chao-Wei Huang; Sung Min Lin; Wei-Peng Deng
南台科技大學	2006-11	Swift Transition Weight Analysis for Asynchronous Finite State	Jung-Lin Yang; Chih-Feng Tai; Sung-Min Lin
南台科技大學	2006-11	Tunable Delay Element for Low Power VLSI Circuit Design	Jung-Lin Yang; Chih-Wei Chao; Sung-Min Lin
南台科技大學	2006	自我時序系統之高階與後端模擬平台	林嵩閔; Sung-Min Lin
南台科技大學	2005-12	HDL Modeling for Optimization and Verification of Asynchronous Controllers	Jung-Lin Yang; Erik Brunvand; Sung-Min Lin
南台科技大學	2005-08	HDL Modeling for Optimization and Verification Of Extended Burst-Mode	Jung-Lin Yang; Erik Brunvand; Sung-Min Lin
南台科技大學	2005-05	HDL Modeling for Burst-mode and Extended Burst-mode (BM/XBM) Asynchronous Controllers	Jung-Lin Yang; Sung-Min Lin

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