English  |  正體中文  |  简体中文  |  Total items :2851814  
Visitors :  44849304    Online Users :  1381
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

"sung tze yun"

Return to Browse by Author
Sorting by Title Sort by Date

Showing items 106-130 of 195  (8 Page(s) Totally)
<< < 1 2 3 4 5 6 7 8 > >>
View [10|25|50] records per page

Institution Date Title Author
中華大學 2006 A High-Efficient Line-Based Architecture for 2-D Lifting-Based DWT Using 9/7 Wavelet Filters 宋志雲; Sung, Tze-Yun
中華大學 2006 VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor 宋志雲; Sung, Tze-Yun
中華大學 2006 VLSI Architectures for 2-D Forward and Inverse Discrete Wavelet Transform Using 4-tap Daubechies Filters 宋志雲; Sung, Tze-Yun
中華大學 2006 Memory-Efficiency Multiplierless VLSI Architecture for 2-D DWT Using 9/7 Wavelet Filter 宋志雲; Sung, Tze-Yun
中華大學 2006 Cost-Effective Architectures for 2-D Forward and Inverse Discrete Cosine Transform Architecture 宋志雲; Sung, Tze-Yun
中華大學 2006 An Efficient Line-Based Architecture for 2-D Lifting-Based DCT Using 9/7 Wavelet Filters 宋志雲; Sung, Tze-Yun
中華大學 2006 Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation 宋志雲; Sung, Tze-Yun
中華大學 2006 High-Efficiency and Low-Power Architectures for 2-D DCT and IDCT Based on CORDIC Rotation 宋志雲; Sung, Tze-Yun
中華大學 2006 High-Efficient Architectures for 2-D Lifting-Based Forward and Inverse Discrete Wavelet Transform Using 5/3 Wavelet Filter 宋志雲; Sung, Tze-Yun
中華大學 2006 A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic 宋志雲; Sung, Tze-Yun
中華大學 2006 A Low-Power and High-Efficiency Image Scalar Algorithm for LCD Display Controller 宋志雲; Sung, Tze-Yun
中華大學 2006 無線網絡應用於新世代城鄉安全監控系統 宋志雲; Sung, Tze-Yun
中華大學 2006 台灣科技產業結構性改變與管理之變遷 宋志雲; Sung, Tze-Yun
中華大學 2006 無線網絡應用於智慧型車輛安全監控及物流系統 宋志雲; Sung, Tze-Yun
中華大學 2006 A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic in Power-Aware 3-D Graphics Rendering 宋志雲; Sung, Tze-Yun
中華大學 2006 VLSI Implementation of Double- Rotation CORDIC Arithmetic (DRCA) 宋志雲; Sung, Tze-Yun
中華大學 2006 Two Fast Architectures for 2-D DWT and IDWT Using 4-Tap Daubechies Filters 宋志雲; Sung, Tze-Yun
中華大學 2006 A High-Efficient Line-Based Architecture for 2-D Discrete Wavelet Transform Based on Lifting Scheme Using 9/7 Wavelet Filters 宋志雲; Sung, Tze-Yun
中華大學 2006 VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors 宋志雲; Sung, Tze-Yun
中華大學 2006 A Parallel and Pipelined Architecture for 2-D CORDIC-Based Inverse Discrete Cosine Transform 宋志雲; Sung, Tze-Yun
中華大學 2006 Low-Power and High-Speed Architectures for 2-D DCT and IDCT Based on CORDIC Rotation 宋志雲; Sung, Tze-Yun
中華大學 2006 VLSI Implementation of A High-Efficient and Cost-Effective LCD Signal Processor 宋志雲; Sung, Tze-Yun
中華大學 2006 The Closed-loop Control for Dual-Output Boost Converter with Single Inductor 宋志雲; Sung, Tze-Yun
中華大學 2006 Memory-Efficient and Fast Architectures for Forward and Inverse DCT with Multiplierless Operation 宋志雲; Sung, Tze-Yun
中華大學 2006 Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor Based on Pipelined CORDIC Rotations 宋志雲; Sung, Tze-Yun

Showing items 106-130 of 195  (8 Page(s) Totally)
<< < 1 2 3 4 5 6 7 8 > >>
View [10|25|50] records per page