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Institution	Date	Title	Author
中華大學	2005	A High-Speed / Ultra Low-Power Architecture for 2-D Discrete Wavelet Transform	宋志雲; Sung, Tze-Yun
中華大學	2005	A High-Speed and Low-power Architecture for 2-D Inverse Discrete Wavelet Transform with Multiplierless Operation	宋志雲; Sung, Tze-Yun
中華大學	2005	Analysis and Implementation of Pipelining Architectures for 2-D Discrete Wavelet Transform and Its Inversion Using Direct Cascading Form	宋志雲; Sung, Tze-Yun
中華大學	2005	An Efficient Architecture for 2-D Inverse Discrete Wavelet Transform with Multiplierless Operation	宋志雲; Sung, Tze-Yun
中華大學	2005	FPGA Implementation of 3-D Graphic Engine Using Double Rotation CORDIC Algorithm	宋志雲; Sung, Tze-Yun
中華大學	2005	A Novel VLSI Implementation of High-Throughput 3-D Rotation for Graphic Engine Using Double Rotation CORDIC Algorithm	宋志雲; Sung, Tze-Yun
中華大學	2005	A High-Efficiency Architecture for 3-D Rotation Using Fast CORDIC Algorithm in Graphic Engine	宋志雲; Sung, Tze-Yun
中華大學	2005	Area, Power and Throughput Trade-Offs in the Design of Pipelined 2-D Discrete Wavelet Transform Architectures Using Direct Cascading Form	宋志雲; Sung, Tze-Yun
中華大學	2005	A High Speed and Low Dead Zone PFD with Delay Circuits	宋志雲; Sung, Tze-Yun
中華大學	2005	A Novel Implementation of High-Throughput 3-D Rotation and Perspective for Graphic Engine	宋志雲; Sung, Tze-Yun
中華大學	2005	A High-Speed /Ultra Low-Power Architecture for Two-Dimensional Discrete Wavelet Transform	宋志雲; Sung, Tze-Yun
中華大學	2005	FPGA Implementation of High-Speed 3-D Graphic Engine Using Double Rotation CORDIC Algorithm	宋志雲; Sung, Tze-Yun
中華大學	2005	A High-Speed/Low-Power Architecture for Two-Dimensional Inverse Discrete Wavelet Transform With Multiplierless Operation	宋志雲; Sung, Tze-Yun
中華大學	2005	A Novel Implementation of High-Throughput 3-D Rotation and Perspective for Graphic Engine	宋志雲; Sung, Tze-Yun
中華大學	2005	FPGA Implementation of a High-Speed CORDIC-Based Sine and Cosine Generator for OFDM Systems	宋志雲; Sung, Tze-Yun
中華大學	2004	The Algorithms of Color Spaces and Image Dithering for Flat Panel Display Controller for VLSI Implementation	宋志雲; Sung, Tze-Yun
中華大學	2004	Numerical Accuracy and Hardware Trade-offs for CORDIC Arithmetic for DSP Applications	宋志雲; Sung, Tze-Yun
中華大學	2004	Design and Implementation of a 1024-Point FFT Processor Using Memory Interleaving	宋志雲; Sung, Tze-Yun
中華大學	2004	Implementation of Color Image Processing Algorithms for LCD Monitor Controller	宋志雲; Sung, Tze-Yun
中華大學	2004	A Memory-Efficient and High-Speed FFT/IFFT Processor for OFDM Systems	宋志雲; Sung, Tze-Yun
中華大學	2004	A Memory-Efficient and High-Speed Split-radix FFT/IFFT Processor Based on Pipelined CORDIC Rotations	宋志雲; Sung, Tze-Yun
中華大學	2004	The Double Rotation CORDIC Algorithm: New Results for VLSI Implementation of Fast Sine/Cosine Generation	宋志雲; Sung, Tze-Yun
中華大學	2004	The Quantization Effects of CORDIC Arithmetic for Digital Signal Processing Applications	宋志雲; Sung, Tze-Yun
中華大學	2004	A Novel VLSI Implementation of a High-Speed CORDIC-Based Sine and Cosine Generator for OFDM Systems	宋志雲; Sung, Tze-Yun
中華大學	2004	A Low-Latency CORDIC- Based Sine and Cosine Generator for OFDM System	宋志雲; Sung, Tze-Yun
中華大學	2004	Double Rotation CORDIC: A Novel Algorithm for Fast Sine/Cosine Generation	宋志雲; Sung, Tze-Yun
中華大學	2004	A Memory-Efficient and High-Speed CORDIC-Based Split-radix FFT Processor for OFDM System	宋志雲; Sung, Tze-Yun
中華大學	2004	A Parallel-Pipelined Constant Geometry Algorithm (PCGA) for Computation of FFT on a Special Processor	宋志雲; Sung, Tze-Yun
中華大學	2004	An Efficient 8×8 2-D DCT Core Processor for Image Data Compression	宋志雲; Sung, Tze-Yun
中華大學	2004	A Cost-Effective 1024-Point FFT Processor	宋志雲; Sung, Tze-Yun
中華大學	2004	A Novel Implementation of Cost-Effective Parallel-Pipelined 8×8 DCT Processor	宋志雲; Sung, Tze-Yun
中華大學	2004	Implementation of Optimal Image Scaling Algorithm for LCD Monitor Controller	宋志雲; Sung, Tze-Yun
中華大學	2004	A Novel VLSI Implementation of 8×8 2-D DCT/IDCT Core Processor for Image Data Compression	宋志雲; Sung, Tze-Yun
中華大學	2004	An Efficient 8×8 2-D DCT /IDCT Core Processor for Image Data Compression	宋志雲; Sung, Tze-Yun
中華大學	2004	An Efficient Parallel-Pipelined Algorithm and Architecture for Computation of 2-D DCT on Two Successive Processors	宋志雲; Sung, Tze-Yun
中華大學	2004	Fast CORDIC-Based Sine/Cosine Generator Using a Double Rotation Algorithm and a Novel -prediction Algorithm	宋志雲; Sung, Tze-Yun
中華大學	2004	A Parallel-Pipelined Processor for Fast Fourier Transform	宋志雲; Sung, Tze-Yun
中華大學	2003	Image Processing Algorithms Applying on Flat Panel Display Controller	宋志雲; Sung, Tze-Yun
中華大學	2003	Chip Implementation of Image Processing Algorithms for Flat Panel Display Controller-F*Con-V.1	宋志雲; Sung, Tze-Yun
中華大學	2003	Design and Implementation Of Enriched Instruction Set 8051 Microcontroller-CH*MCU-R251	宋志雲; Sung, Tze-Yun
中華大學	2003	Chip Implementation of Optimal Image Scaling Algorithm for Flat Panel Display Controller-F*Con-V.1	宋志雲; Sung, Tze-Yun
中華大學	2003	Design and Implementation of 16-bit General Purpose Microcontroller - CH*MCU-16”	宋志雲; Sung, Tze-Yun
中華大學	2003	Implementation of Image Processing Algorithms for Flat Panel Display Using Hardware Description Language	宋志雲; Sung, Tze-Yun
中華大學	2003	Chip Implementation of Image Processing Algorithms for Flat Panel Display Controller F*Con-V.1	宋志雲; Sung, Tze-Yun
中華大學	2003	HDL Implementation of Optimal Image Scaling Algorithm for Flat Panel Display	宋志雲; Sung, Tze-Yun

Showing items 151-195 of 195 (4 Page(s) Totally)
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