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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"sung tze yun"的相關文件
顯示項目 101-110 / 195 (共20頁)
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每頁顯示[10|25|50]項目
| 中華大學 |
2006 |
A High-Efficient Image Scalar Algorithm for LCD Signal Processor
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of 2-D Discrete Cosine Transform Architecture Based on CORDIC Rotation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of CORDIC-Based Geometry Rotation for High-Speed 3-D Computer Graphic Systems
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
A High-Throughput and Memory-Efficiency 2-D DCT Architecture Based on CORDIC Rotation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of High-Efficient 2-D Lifting-Based DWT and IDWT Processors
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
A High-Efficient Line-Based Architecture for 2-D Lifting-Based DWT Using 9/7 Wavelet Filters
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Architectures for 2-D Forward and Inverse Discrete Wavelet Transform Using 4-tap Daubechies Filters
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Memory-Efficiency Multiplierless VLSI Architecture for 2-D DWT Using 9/7 Wavelet Filter
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Cost-Effective Architectures for 2-D Forward and Inverse Discrete Cosine Transform Architecture
|
宋志雲; Sung, Tze-Yun |
顯示項目 101-110 / 195 (共20頁)
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