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机构	日期	题名	作者
中華大學	2006	A High-Efficient and Cost-Effective LCD Signal Processor	宋志雲; Sung, Tze-Yun
中華大學	2005	Design and Analysis of a High-Speed Sine/Cosine Generator in OFDM System	宋志雲; Sung, Tze-Yun
中華大學	2005	A Parallel and Pipelined Architecture for Fast Three-Dimensional Rotation Using Double Rotation CORDIC Algorithm in Graphic Engine	宋志雲; Sung, Tze-Yun
中華大學	2005	An Efficient 8×8 2-D DCT /IDCT Core Processor for Image Data Compression	宋志雲; Sung, Tze-Yun
中華大學	2005	FPGA Implementation of a High-Speed CORDIC-Based Sine and Cosine Generator for OFDM Systems	宋志雲; Sung, Tze-Yun
中華大學	2005	The Quantization Effects of CORDIC Arithmetic with Expanding the Convergence Range	宋志雲; Sung, Tze-Yun
中華大學	2005	Two Fast Architectures for Two-Dimensional Discrete Wavelet Transform and Its Inversion Using Direct Form	宋志雲; Sung, Tze-Yun
中華大學	2005	Design of a High-Speed Sine and Cosine Generator Based on Double-Rotation CORDIC Algorithm in OFDM System	宋志雲; Sung, Tze-Yun
中華大學	2005	Design and Analysis of Pipelined Discrete Wavelet Transform Architectures	宋志雲; Sung, Tze-Yun
中華大學	2005	Hardware Implementation of Fast 3-D Rotation Using Double Rotation CORDIC Algorithm in Graphic Engine	宋志雲; Sung, Tze-Yun
中華大學	2005	VLSI Implementation of Pipelined Architectures for 2-D Discrete Wavelet Transform and Its Inversion	宋志雲; Sung, Tze-Yun
中華大學	2005	A Full Band Low Power Low Phase Noise LC VCO with RF CMOS Varactor	宋志雲; Sung, Tze-Yun
中華大學	2005	A Free Jitter Phase Frequency Detector with Negligible Dead Zone	宋志雲; Sung, Tze-Yun
中華大學	2005	VLSI Implementation of a CORDIC-Based 2-D Discrete Cosine Transform and Its Inverse	宋志雲; Sung, Tze-Yun
中華大學	2005	Design and Implementation of LCD Monitor/TV Signal Processor	宋志雲; Sung, Tze-Yun
中華大學	2005	Hardware Implementation of High-Throughput 3-D Rotation for Graphic Engine Using Double Rotation CORDIC Algorithm	宋志雲; Sung, Tze-Yun
中華大學	2005	FPGA Implementation of Image Scalar for LCD Monitor and TV Controller	宋志雲; Sung, Tze-Yun
中華大學	2005	Area, Power and Throughput Trade-Offs for 2-D Inverse Discrete Wavelet Transform Architectures Using Direct Form	宋志雲; Sung, Tze-Yun
中華大學	2005	Area and Throughput Trade-offs in The Design of Pipelined 2-D Discrete Wavelet Transform Architectures	宋志雲; Sung, Tze-Yun
中華大學	2005	VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN	宋志雲; Sung, Tze-Yun
中華大學	2005	A High-Speed / Ultra Low-Power Architecture for 2-D Discrete Wavelet Transform	宋志雲; Sung, Tze-Yun
中華大學	2005	A High-Speed and Low-power Architecture for 2-D Inverse Discrete Wavelet Transform with Multiplierless Operation	宋志雲; Sung, Tze-Yun
中華大學	2005	Analysis and Implementation of Pipelining Architectures for 2-D Discrete Wavelet Transform and Its Inversion Using Direct Cascading Form	宋志雲; Sung, Tze-Yun
中華大學	2005	An Efficient Architecture for 2-D Inverse Discrete Wavelet Transform with Multiplierless Operation	宋志雲; Sung, Tze-Yun
中華大學	2005	FPGA Implementation of 3-D Graphic Engine Using Double Rotation CORDIC Algorithm	宋志雲; Sung, Tze-Yun

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