|
English
|
正體中文
|
简体中文
|
Total items :0
|
|
Visitors :
51074384
Online Users :
1001
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
|
|
|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"sung tze yun"
Showing items 146-155 of 195 (20 Page(s) Totally)
<< < 10 11 12 13 14 15 16 17 18 19 > >>
View [10|25|50] records per page
| 中華大學 |
2005 |
Hardware Implementation of High-Throughput 3-D Rotation for Graphic Engine Using Double Rotation CORDIC Algorithm
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
FPGA Implementation of Image Scalar for LCD Monitor and TV Controller
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Area, Power and Throughput Trade-Offs for 2-D Inverse Discrete Wavelet Transform Architectures Using Direct Form
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Area and Throughput Trade-offs in The Design of Pipelined 2-D Discrete Wavelet Transform Architectures
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
A High-Speed / Ultra Low-Power Architecture for 2-D Discrete Wavelet Transform
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
A High-Speed and Low-power Architecture for 2-D Inverse Discrete Wavelet Transform with Multiplierless Operation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Analysis and Implementation of Pipelining Architectures for 2-D Discrete Wavelet Transform and Its Inversion Using Direct Cascading Form
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
An Efficient Architecture for 2-D Inverse Discrete Wavelet Transform with Multiplierless Operation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
FPGA Implementation of 3-D Graphic Engine Using Double Rotation CORDIC Algorithm
|
宋志雲; Sung, Tze-Yun |
Showing items 146-155 of 195 (20 Page(s) Totally)
<< < 10 11 12 13 14 15 16 17 18 19 > >>
View [10|25|50] records per page
|
