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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"sung tze yun"的相關文件
顯示項目 36-60 / 195 (共8頁)
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| 中華大學 |
2011 |
A ROM-Less Direct Digital Frequency Synthesizer Based on a Scaling-free CORDIC algorithm
|
宋志雲; Sung, Tze-Yun |
| 國立聯合大學 |
2010 |
A novel linear array for discrete cosine transform
|
Shieh, Yaw-Shih ; Sung, Tze-Yun; Hsin, Hsi-Chin |
| 國立聯合大學 |
2010 |
Multiplierless, reconfigurable folded architecture for VLSI wavelet filter
|
Sung, Tze-Yun ; Hsin, Hsi-Chin; Chang, Sheng-Dong |
| 國立聯合大學 |
2010 |
Reconfigurable architecture for VLSI 9/7-5/3 wavelet filter
|
Sung, Tze-Yun; Hsin, Hsi-Chin |
| 國立聯合大學 |
2010 |
Folded reconfigurable architecture for VLSI wavelet filter
|
Sung, Tze-Yun ; Hsin, Hsi-Chin; Zhang, Sheng-Dong |
| 中華大學 |
2010 |
A Novel VLSI Linear Array for Discrete Cosine Transform and Its Inverse
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2010 |
Folded Reconfigurable Architecture for VLSI Wavelet Filter
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2010 |
Multiplierless, Folded Reconfigurable Architecture for VLSI Wavelet Filter
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2010 |
A Novel VLSI Linear Array for 2-D DCT/IDCT
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2010 |
A Novel Linear Array for Discrete Cosine Transform
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2010 |
Low-power and high-speed CORDIC-based split-radix FFT processor for OFDM systems
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2010 |
Multiplierless, Reconfigurable Folded Architecture for VLSI Wavelet Filter
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2010 |
Reconfigurable Architecture for VLSI 9/7-5/3 Wavelet Filter
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2010 |
An Efficient VLSI Linear Array for DCT/IDCT Using Subband Decomposition Algorithm
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2010 |
A Novel Linear Array for Discrete Cosine Transform
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2010 |
Reconfigurable Architecture for VLSI 9/7-5/3 Wavelet Filter
|
宋志雲; Sung, Tze-Yun |
| 國立聯合大學 |
2009 |
High-SFDR and multiplierless direct digital frequency synthesizer
|
Sung, Tze-Yun; Hsin, Hsi-Chin; Ko, Lu-Ting |
| 國立聯合大學 |
2009 |
Low-power and high-SFDR direct digital frequency synthesizer based on hybrid CORDIC algorithm
|
Sung, Tze-Yun; Ko, Lyu-Ting; Hsin, Hsi-Chin |
| 國立聯合大學 |
2009 |
Quad-tree based adaptive wavelet packet image coding
|
Sung, Tze-Yun ; Hsin, Hsi-Chin |
| 國立聯合大學 |
2009 |
Reconfigurable VLSI architecture for FFT processor
|
Sung, Tze-Yun; Hsin, Hsi-Chin; Ko, Lu-Ting |
| 國立聯合大學 |
2009 |
Context-based rate distortion estimation and its application to wavelet image coding
|
Hsin, Hsi-Chin ; Sung, Tze-Yun |
| 中華大學 |
2009 |
A Simple Rate Distortion Estimation for Embedded Block Coding
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
Low-Power and High-SFDR Hybrid CORDIC-Based Direct Digital Frequency Synthesizer
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
JPEG2000-Based Image Features with Its Application to Texture Segmentation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
Low-Power and High-SFDR Direct Digital Frequency Synthesizer Based on Hybrid CORDIC Algorithm
|
宋志雲; Sung, Tze-Yun |
顯示項目 36-60 / 195 (共8頁)
<< < 1 2 3 4 5 6 7 8 > >>
每頁顯示[10|25|50]項目
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