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教育部委托研究计画 计画执行:国立台湾大学图书馆
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"sung tze yun"的相关文件
显示项目 51-75 / 195 (共8页)
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每页显示[10|25|50]项目
| 中華大學 |
2010 |
Reconfigurable Architecture for VLSI 9/7-5/3 Wavelet Filter
|
宋志雲; Sung, Tze-Yun |
| 國立聯合大學 |
2009 |
High-SFDR and multiplierless direct digital frequency synthesizer
|
Sung, Tze-Yun; Hsin, Hsi-Chin; Ko, Lu-Ting |
| 國立聯合大學 |
2009 |
Low-power and high-SFDR direct digital frequency synthesizer based on hybrid CORDIC algorithm
|
Sung, Tze-Yun; Ko, Lyu-Ting; Hsin, Hsi-Chin |
| 國立聯合大學 |
2009 |
Quad-tree based adaptive wavelet packet image coding
|
Sung, Tze-Yun ; Hsin, Hsi-Chin |
| 國立聯合大學 |
2009 |
Reconfigurable VLSI architecture for FFT processor
|
Sung, Tze-Yun; Hsin, Hsi-Chin; Ko, Lu-Ting |
| 國立聯合大學 |
2009 |
Context-based rate distortion estimation and its application to wavelet image coding
|
Hsin, Hsi-Chin ; Sung, Tze-Yun |
| 中華大學 |
2009 |
A Simple Rate Distortion Estimation for Embedded Block Coding
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
Low-Power and High-SFDR Hybrid CORDIC-Based Direct Digital Frequency Synthesizer
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
JPEG2000-Based Image Features with Its Application to Texture Segmentation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
Low-Power and High-SFDR Direct Digital Frequency Synthesizer Based on Hybrid CORDIC Algorithm
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
Reconfigurable VLSI Architecture for FFT Processor
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
Reconfigurable VLSI Architecture for 9/7-5/3 Discrete Wavelet Transform
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
High-SFDR and Multiplierless Direct Digital Frequency Synthesizer
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
VLSI Reconfigurable Architecture for 9/7-5/3 Lifting-Based Discrete Wavelet Transform
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
Context-Based Rate Distortion Estimation and Its Application to Wavelet Image Coding
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
ㄧ種快速正弦與餘弦函數產生器
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
Quad-Tree Based Adaptive Wavelet Packet Image Coding
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
High-SFDR and Multiplierless Direct Digital Frequency Synthesizer
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
Reconfigurable VLSI Architecture for FFT Processor
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2008 |
Quad-Tree Based Adaptive Wavelet Packet Transform for Image Coding
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2008 |
VLSI Implementation of Discrete Wavelet Transform with Lifting Scheme
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2008 |
Image Coding with Adaptive Wavelet Packet Trees
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2008 |
Design of Multiplierless and High-Performance DWT and IDWT Architectures Using 4-tap Daubechies Filters
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2008 |
Adaptive Selection and Rearrangement of Wavelet Packets for Quad-Tree Image Coding
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2008 |
Image Coding with Adaptive Wavelet Packet Trees
|
宋志雲; Sung, Tze-Yun |
显示项目 51-75 / 195 (共8页)
<< < 1 2 3 4 5 6 7 8 > >>
每页显示[10|25|50]项目
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