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總筆數 :2851802
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44729928
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1058
教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"sung tze yun"的相關文件
顯示項目 96-145 / 195 (共4頁) << < 1 2 3 4 > >> 每頁顯示[10|25|50]項目
| 中華大學 |
2006 |
Low-Power and Multiplierless Architectures for Line-Based 2-D DWT and IDWT
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
An Efficient CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphics Rendering
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
High-Efficient Architectures for 2-D Lifting-Based Forward and Inverse Discrete Wavelet Transform
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
High-Efficient Architectures for Forward and Inverse Discrete Wavelet Transform Using 4-tap Daubechies Filters
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
A High-Efficient Image Scalar Algorithm for LCD Signal Processor
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of 2-D Discrete Cosine Transform Architecture Based on CORDIC Rotation
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of CORDIC-Based Geometry Rotation for High-Speed 3-D Computer Graphic Systems
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
A High-Throughput and Memory-Efficiency 2-D DCT Architecture Based on CORDIC Rotation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of High-Efficient 2-D Lifting-Based DWT and IDWT Processors
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
A High-Efficient Line-Based Architecture for 2-D Lifting-Based DWT Using 9/7 Wavelet Filters
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Architectures for 2-D Forward and Inverse Discrete Wavelet Transform Using 4-tap Daubechies Filters
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Memory-Efficiency Multiplierless VLSI Architecture for 2-D DWT Using 9/7 Wavelet Filter
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Cost-Effective Architectures for 2-D Forward and Inverse Discrete Cosine Transform Architecture
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
An Efficient Line-Based Architecture for 2-D Lifting-Based DCT Using 9/7 Wavelet Filters
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
High-Efficiency and Low-Power Architectures for 2-D DCT and IDCT Based on CORDIC Rotation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
High-Efficient Architectures for 2-D Lifting-Based Forward and Inverse Discrete Wavelet Transform Using 5/3 Wavelet Filter
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
A Low-Power and High-Efficiency Image Scalar Algorithm for LCD Display Controller
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
無線網絡應用於新世代城鄉安全監控系統
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
台灣科技產業結構性改變與管理之變遷
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
無線網絡應用於智慧型車輛安全監控及物流系統
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic in Power-Aware 3-D Graphics Rendering
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of Double- Rotation CORDIC Arithmetic (DRCA)
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Two Fast Architectures for 2-D DWT and IDWT Using 4-Tap Daubechies Filters
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
A High-Efficient Line-Based Architecture for 2-D Discrete Wavelet Transform Based on Lifting Scheme Using 9/7 Wavelet Filters
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
A Parallel and Pipelined Architecture for 2-D CORDIC-Based Inverse Discrete Cosine Transform
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Low-Power and High-Speed Architectures for 2-D DCT and IDCT Based on CORDIC Rotation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of A High-Efficient and Cost-Effective LCD Signal Processor
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
The Closed-loop Control for Dual-Output Boost Converter with Single Inductor
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Memory-Efficient and Fast Architectures for Forward and Inverse DCT with Multiplierless Operation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor Based on Pipelined CORDIC Rotations
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
A High-Efficient and Cost-Effective LCD Signal Processor
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Design and Analysis of a High-Speed Sine/Cosine Generator in OFDM System
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
A Parallel and Pipelined Architecture for Fast Three-Dimensional Rotation Using Double Rotation CORDIC Algorithm in Graphic Engine
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
An Efficient 8×8 2-D DCT /IDCT Core Processor for Image Data Compression
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
FPGA Implementation of a High-Speed CORDIC-Based Sine and Cosine Generator for OFDM Systems
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
The Quantization Effects of CORDIC Arithmetic with Expanding the Convergence Range
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Two Fast Architectures for Two-Dimensional Discrete Wavelet Transform and Its Inversion Using Direct Form
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Design of a High-Speed Sine and Cosine Generator Based on Double-Rotation CORDIC Algorithm in OFDM System
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Design and Analysis of Pipelined Discrete Wavelet Transform Architectures
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Hardware Implementation of Fast 3-D Rotation Using Double Rotation CORDIC Algorithm in Graphic Engine
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
VLSI Implementation of Pipelined Architectures for 2-D Discrete Wavelet Transform and Its Inversion
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
A Full Band Low Power Low Phase Noise LC VCO with RF CMOS Varactor
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
A Free Jitter Phase Frequency Detector with Negligible Dead Zone
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
VLSI Implementation of a CORDIC-Based 2-D Discrete Cosine Transform and Its Inverse
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Design and Implementation of LCD Monitor/TV Signal Processor
|
宋志雲; Sung, Tze-Yun |
顯示項目 96-145 / 195 (共4頁) << < 1 2 3 4 > >> 每頁顯示[10|25|50]項目
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