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Institution Date Title Author
臺大學術典藏 2018-09-10T07:08:33Z A jitter-tolerance-enhanced CDR using a GDCO-based phase detector Che-Fu Liang;Sy-Chyuan Hwu;Shen-Iuan Liu; Che-Fu Liang; Sy-Chyuan Hwu; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:08:33Z A jitter-tolerance-enhanced CDR using a GDCO-based phase detector Che-Fu Liang;Sy-Chyuan Hwu;Shen-Iuan Liu; Che-Fu Liang; Sy-Chyuan Hwu; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T06:35:21Z A jitter-tolerance-enhanced CDR using a GDCO-based phase detector Che-Fu Liang; Sy-Chyuan Hwu; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T06:35:18Z A multi-band burst-mode clock and data recovery circuit Che-Fu Liang; Sy-Chyuan Hwu; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T05:27:05Z A 2.5Gbps burst-mode clock and data recovery circuit Che-Fu Liang; Sy-Chyuan Hwu; Shen-Iuan Liu; SHEN-IUAN LIU

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