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"tai ya hsiang"的相關文件
顯示項目 156-165 / 203 (共21頁)
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| 國立交通大學 |
2014-12-08T15:14:31Z |
Investigation of source-follower type analog buffer using low temperature poly-Si TFTs
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Chen, Bo-Ting; Tai, Ya-Hsiang; Wei, Ying-Jyun; Wei, Kai-Fang; Tsai, Chun-Chien; Huang, Chun-Yao; Kuo, Yu-Ju; Cheng, Huang-Chung |
| 國立交通大學 |
2014-12-08T15:13:37Z |
Statistical study on the temperature dependence of the turn-on characteristics for p-type LTPS TFTs
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Kuo, Yan-Fu; Tai, Ya-Hsiang |
| 國立交通大學 |
2014-12-08T15:13:02Z |
A statistical model for simulating the effect of UPS TFT device variation for SOP applications
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Tai, Ya-Hsiang; Huang, Shih-Che; Chen, Wan-Ping; Chao, Yu-Te; Chou, Yen-Pang; Peng, Guo-Feng |
| 國立交通大學 |
2014-12-08T15:12:56Z |
Elimination of photoleakage current in poly-Si TFTs using a metal-shielding structure
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Lu, Hau-Yan; Chang, Ting-Chang; Liu, Po-Tsun; Li, Hung-Wei; Hu, Chin-Wei; Lin, Kun-Chih; Tai, Ya-Hsiang; Chi, Sien |
| 國立交通大學 |
2014-12-08T15:12:18Z |
Reduction of photoleakage current in polycrystalline silicon thin-film transistor using NH(3) plasma treatment on buffer layer
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Lu, Hau-Yan; Chang, Ting-Chang; Liu, Po-Tsun; Li, Hung-Wei; Hu, Chin-Wei; Lin, Kun-Chin; Wang, Chao-Chun; Tai, Ya-Hsiang; Chi, Sien |
| 國立交通大學 |
2014-12-08T15:12:16Z |
Variation and mismatch effects of the low-temperature poly-Si TFTs on the circuit for the X-ray active matrix sensor
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Tai, Ya-Hsiang; Huang, Shih-Che; Su, Ko-Ching; Tseng, Chen-Yeh |
| 國立交通大學 |
2014-12-08T15:12:05Z |
Capacitance-voltage behaviors of the LTPS TFTs before and after DC stress explained by the slicing model
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Kuo, Yan-Fu; Huang, Shih-Che; Chao, Yu-Te; Tai, Ya-Hsiang |
| 國立交通大學 |
2014-12-08T15:12:04Z |
Highly reliable integrated amorphous silicon thin film transistors gate driver
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Liu, Chin-Wei; Tai, Ya-Hsiang |
| 國立交通大學 |
2014-12-08T15:12:03Z |
Charge-Trapping-Induced Parasitic Capacitance and Resistance in SONOS TFTs Under Gate Bias Stress
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Lin, Chia-Sheng; Chen, Ying-Chung; Chang, Ting-Chang; Jian, Fu-Yen; Li, Hung-Wei; Chen, Shih-Ching; Chuang, Ying-Shao; Chen, Te-Chih; Tai, Ya-Hsiang; Lee, Ming-Hsien; Chen, Jim-Shone |
| 國立交通大學 |
2014-12-08T15:12:02Z |
A low temperature polycrystalline silicon thin film transistor phase locked loop circuit used for clock regeneration
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Tai, Ya-Hsiang; Tseng, Chen-Yeh |
顯示項目 156-165 / 203 (共21頁)
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