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"thapar hk"
Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
| 國立交通大學 |
2014-12-08T15:05:04Z |
A 30-MHZ TRELLIS CODEC CHIP FOR PARTIAL-RESPONSE CHANNELS
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SHUNG, CB; SIEGEL, PH; THAPAR, HK; KARABED, R |
| 國立交通大學 |
2014-12-08T15:04:34Z |
AREA-EFFICIENT ARCHITECTURES FOR THE VITERBI ALGORITHM .1. THEORY
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SHUNG, CB; LIN, HD; CYPHER, R; SIEGEL, PH; THAPAR, HK |
| 國立交通大學 |
2014-12-08T15:04:32Z |
AREA-EFFICIENT ARCHITECTURES FOR THE VITERBI ALGORITHM .2. APPLICATIONS
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SHUNG, CB; LIN, HD; CYPHER, R; SIEGEL, PH; THAPAR, HK |
| 國立交通大學 |
2014-12-08T15:04:17Z |
REAL-TIME RECORDING RESULTS FOR A TRELLIS-CODED PARTIAL-RESPONSE (TCPR) SYSTEM
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THAPAR, HK; SHUNG, CB; RAE, JW; KARABED, R; SIEGEL, PH |
Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
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