臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

關於TAIR
	計畫說明

瀏覽
	典藏機構
	作者
	題名
	日期
	統計圖表
	機構即時統計
	學術趨勢

消息
	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

著作權
	出版社及期刊政策查詢
	TAIR著作權會議記錄

相關連結
	機構典藏計畫網站
	ROAR
	OpenDOAR
	SHERPA
	OAIster
	JAIRO
	Ira
	DSPACE
	RWWR
	臺大學術典藏NTU Scholars

"timothy k shih"的相關文件

回到依作者瀏覽
依題名排序	依日期排序

顯示項目 361-389 / 389 (共8頁)
<< < 1 2 3 4 5 6 7 8
每頁顯示[10|25|50]項目

機構	日期	題名	作者
亞洲大學	1995-01	An Operational Semantics Approach to Disciplined Exceptions in Logic Programming	Timothy K. Shih ; Fuyau Lin
亞洲大學	1995	Level Models Automation for Virtual Environment	Jiung-Yao Huang; Shing-Ping Cheng; Timothy K. Shih
亞洲大學	1995	Multimedia Presentation Designs with Database Support	Timothy K. Shih; Chin-Hwa Kuo; Kuan-Shen An
亞洲大學	1995	Visualization of Well Engineered Logic Specification Programs	Timothy K. Shih; Chin-Hwa Kuo; Wen-Shan Yu
亞洲大學	1995	A Metric of Inheritance Hierarchy for Object-Oriented Software Complexity	Chi-Ming Chung; Chun-Cha Wang; Timothy K. Shih; Jich-Yan Tsai
亞洲大學	1995	An Artificial Intelligent Approach to Multimedia Authoring	Timothy K. Shih
亞洲大學	1995	A Hierarchy Testing of Object-Oriented Program Structure	Chi-Ming Chung; Chun-Cha Wang; Timothy K. Shih
亞洲大學	1995	An Inheritance Level Based Metric for Object-Oriented Software Complexity,	Chi-Ming Chung; Chun-Cha Wang; Timothy K. Shih; Gwo-Ching Hsieh
亞洲大學	1995	Visualization of Logic Specification Programs	Timothy K. Shih;Rob Langsner
亞洲大學	1994-12	SPEC: A Specification Processing Environment with Controls	Timothy K. Shih ; Ruth E. Davis
亞洲大學	1994-04	A Temporal Arithmetic Based Reasoning System for Systolic Array Designs	Timothy K. Shih ; Nam Ling
亞洲大學	1994	Continuation Semantics of Logic Programs with Disciplined Exception Handling	Timothy K. Shih
亞洲大學	1993-09	Verification of Systolic Architecture Designs	Fuyau Lin ; Timothy K. Shih
亞洲大學	1993	The Use of Fixed Point Induction in Verifying Systolic Array Designs: An Applicative Approach	Nam Ling; Jonathan Huang; Timothy K. Shih
亞洲大學	1993	VSTA: A Prolog-based Formal Verifier for Systolic Array Designs	Nam Ling;Timothy K. Shih
亞洲大學	1992	A Temporal Rule-Based Expert System for Systolic Array Designs	Timothy K. Shih; Nam Ling; Xi Chen
亞洲大學	1992	Program Generation and Controls in a Specification Processing Environment,	Timothy K. Shih;Ruth Davis
亞洲大學	1992	The Specification and Verification of Synchronous Concurrent Computation	Fuyau Lin; Timothy K. Shih; Huanchau Lin; Hsiren Wang
亞洲大學	1992	A Specification Processing Environment for Making Well Engineered Logic Programs	Timothy K. Shih; Ruth Davis; Rob Langsner
亞洲大學	1992	Intelligence Backtracking and Controls Based on a Deduction Status Representation in Logic Programming	Timothy K. Shih;Ruth Davis
亞洲大學	1992	Verification of Systolic Architecture Designs	Fuyau Lin;Timothy K. Shih
亞洲大學	1992	Inductive Techniques for Formal Verification of Systolic Array Designs in DSP Applications	Nam Ling; Timothy K. Shih; Jonathan Huang
亞洲大學	1992	Using Prolog as a Tool for Systolic Array Designs	Fuyau Lin; Timothy K. Shih; Nam Lin; Ruth Davis
亞洲大學	1992	Disciplined Exceptions in Logic Programming,	Timothy K. Shih; Ruth E. Davis; Fuyau Lin
亞洲大學	1992	An Automatic Design Specification and Verification Tool for Systolic Architecture	Timothy K. Shih; Nam Ling; Ruth Davis; Fuyau Lin
亞洲大學	1991	Verification Tools for Systolic Array Design	Fuyau Lin; Timothy K. Shih; Nam Ling
亞洲大學	1991	Axiomatic Approach for Systolic Array Design	Fuyau Lin; Timothy K. Shih;Nam Ling
亞洲大學	1991	Automatic Formal Verification of Systolic Array Designs	Nam Ling; Fuyau Lin; Timothy K. Shih;Ruth Davis
亞洲大學	1990	A CASE for Logic Programming	R. E. Davis;Timothy K. Shih

顯示項目 361-389 / 389 (共8頁)
<< < 1 2 3 4 5 6 7 8
每頁顯示[10|25|50]項目

	English \| 正體中文 \| 简体中文 \| 總筆數 :0
	造訪人次 : 51195507 線上人數 : 732 教育部委託研究計畫計畫執行:國立臺灣大學圖書館