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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
國立高雄師範大學 2010-03 A Pseudo Fractional-N Clock Generator with 50% Duty Cycle Output Wei-Bin Yang;Yu-Lung Lo;Ting-Sheng Chao; 羅有龍
國立高雄師範大學 2009-09 Designing Ultra-Low Voltage PLL Using a Bulk-Driven Technique Ting-Sheng Chao;Yu-Lung Lo;Wei-Bin Yang;Kuo-Hsing Cheng; 羅有龍
義守大學 2009-09 A Wide-VDD Embedded SRAM for Dynamic Voltage Asynchronous Systems Shu-Meng Yang;Meng-Fan Chang;Kung-Ting Chen;Wen-Chin Wu;Yuan-Hua Chu;Ting-Sheng Chao;Ming-Bin Chen;Ping-Cheng Chen
國立高雄師範大學 2009-06 High-Speed and Ultra-Low-Voltage Divide-by-4/5 Counter for Frequency Synthesizer Yu-Lung Lo;Wei-Bin Yang;Ting-Sheng Chao;Kuo-Hsing Cheng; 羅有龍
國立高雄師範大學 2009-05 Designing an Ultralow-Voltage Phase-Locked Loop Using a Bulk-Driven Technique Yu-Lung Lo;Wei-Bin Yang;Ting-Sheng Chao;Kuo-Hsing Cheng; 羅有龍
國立高雄師範大學 2008-08 Ultra-Low-Voltage Phase-Locked Loop with Bulk-Input VCO Yu-Lung Lo;Wei-Bin Yang;Ting-Sheng Chao;Jiunn-Way Miaw;Jing-Shiuan Huang;Kuo-Hsing Cheng; 羅有龍
國立高雄師範大學 2007-11 Analysis and Design of Ultra Low VDD Circuit Ting-Sheng Chao;Chung-Yu Chang;Yu-Lung Lo; 羅有龍

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