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Showing items 1-10 of 32  (4 Page(s) Totally)
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Institution Date Title Author
國立交通大學 2017-04-21T06:49:29Z Stacked Low-Voltage PMOS for High-Voltage ESD Protection with Latchup-Free Immunity Tang, Kai-Neng; Liao, Seian-Feng; Ker, Ming-Dou; Chiou, Hwa-Chyi; Huang, Yeh-Jen; Tsai, Chun-Chien; Jou, Yeh-Ning; Lin, Geeng-Lih
國立交通大學 2017-04-21T06:49:12Z ESD Protection Design with Latchup-Free Immunity in 120V SOI Process Huang, Yi-Jie; Ker, Ming-Dou; Huang, Yeh-Jen; Tsai, Chun-Chien; Jou, Yeh-Ning; Lin, Geeng-Lih
國立交通大學 2017-04-21T06:49:05Z Impact of Guard Ring Layout on the Stacked Low-Voltage PMOS for High-Voltage ESD Protection Liao, Seian-Feng; Tang, Kai-Neng; Ker, Ming-Dou; Yeh, Jia-Rong; Chiou, Hwa-Chyi; Huang, Yeh-Jen; Tsai, Chun-Chien; Jou, Yeh-Ning; Lin, Geeng-Lih
國立交通大學 2014-12-08T15:44:30Z High-performance top and bottom double-gate low-temperature poly-silicon thin film transistors fabricated by excimer laser crystallization Tsai, Chun-Chien; Lee, Yao-Jen; Wang, Jyh-Liang; Wei, Kai-Fang; Lee, I-Che; Chen, Chih-Chung; Cheng, Huang-Chung
國立交通大學 2014-12-08T15:30:30Z The Effects of Nanometal-Induced Crystallization on the Electrical Characteristics of Bottom-Gate Poly-Si Thin-Film Transistors Lee, I-Che; Yang, Po-Yu; Hu, Ming-Jhe; Wang, Jyh-Liang; Tsai, Chun-Chien; Chang, Chia-Tsung; Cheng, Huang-Chung
國立交通大學 2014-12-08T15:28:35Z High-performance vertically stacked bottom-gate and top-gate polycrystalline silicon thin-film transistors for three-dimensional integrated circuits Lee, I-Che; Tsai, Tsung-Che; Tsai, Chun-Chien; Yang, Po-Yu; Wang, Chao-Lung; Cheng, Huang-Chung
國立交通大學 2014-12-08T15:25:31Z New pixel circuits for driving organic light emitting diodes with low temperature polycrystalline Si thin film transistors Cheng, Huang-Chung; Chen, Bo-Ting; Kuo, Yu-Ju; Wei, Ying-Jyun; Tsai, Chun-Chien; Chiang, Ko-Yu; Tai, Ya-Hsiang
國立交通大學 2014-12-08T15:25:30Z A new pixel circuit for driving organic light emitting diodes with low temperature polycrystalline thin film transistors Chen, Bo-Ting; Kuo, Yu-Ju; Pai, Cheng-Chiu; Tsai, Chun-Chien; Cheng, Huang-Chung; Tai, Ya-Hsiang
國立交通大學 2014-12-08T15:25:29Z Low temperature polycrystalline silicon thin film transistors fabricated by amorphous silicon spacer structure with pre-patterned TEOS oxide layer Cheng, Huang-Chung; Tsai, Chun-Chien; Lu, Jian-Hao; Chang, Ting-Kuo; Lin, Ching-Wei; Chen, Bo-Ting
國立交通大學 2014-12-08T15:25:29Z New analog buffer circuit using low temperature polycrystalline thin film transistors for active matrix displays Tai, Ya-Hsiang; Chen, Bo-Ting; Kuo, Yu-Ju; Wei, Ying-Jyun; Pai, Cheng-Chiu; Fang, Chun -Hsiang; Tsai, Chun-Chien; Cheng, Huang-Chung

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