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Showing items 1-40 of 40  (1 Page(s) Totally)
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Institution Date Title Author
國立交通大學 2018-08-21T05:53:54Z Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors Zhong, Chia-Wen; Lin, Horng-Chih; Tsai, Jung-Ruey; Liu, Kou-Chen; Huang, Tiao-Yuan
國立交通大學 2018-08-21T05:52:54Z Effect of dose loss of phosphorus on capacitance-voltage characteristics of n-type poly-Si junctionless thin-film transistors Tsai, Jung-Ruey; Wen, Ting-Ting; Lin, Horng-Chih
國立交通大學 2017-04-21T06:49:47Z Reliability Analysis of Amorphous Silicon Thin-Film Transistors during Accelerated ESD Stress Tsai, Jung-Ruey; Wen, Ting-Ting; Yang, Shao-Ming; Sheu, Gene; Chang, Ruey-Dar; Syu, Yi-Jhen; Liu, Chin-Ping; Chang, Hsiu-Fu; Wei, Zhao-Hui
國立交通大學 2017-04-21T06:49:44Z Comparison of Electrical Characteristics of N-type Silicon Junctionless Transistors with and without Film Profile Engineering by TCAD Simulation Tsai, Jung-Ruey; Lin, Horng-Chih; Chang, Hsiu-Fu; Shie, Bo-Shiuan; Wen, Ting-Ting; Huang, Tiao-Yuan
國立交通大學 2017-04-21T06:48:58Z Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors Zhong, Chia-Wen; Lin, Horng-Chih; Tsai, Jung-Ruey; Liu, Kou-Chen; Huang, Tiao-Yuan
國立交通大學 2017-04-21T06:48:27Z ENGINEERED THRESHOLD VOLTAGE IN ALGAN/GAN HEMTS FOR NORMALLY-OFF OPERATION Tsai, Jung-Ruey; Chang, Yi-Sheng; Wei, Kuo-Shu; Wen, Ting-Ting
亞洲大學 2015-06 Reliability Analysis of Amorphous Silicon Thin-Film Transistors during Accelerated ESD stress 蔡宗叡;TSAI, JUNG-RUEY;楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;Cha, Ruey Dar;Chang, Ruey Dar;We, Ting Ting;Wen, Ting Ting
亞洲大學 2015-03 Nitrogen ratio and RTA optimization on sputtered TiN/SiO2/Si electrolyte-insulatoresemiconductor structure for pH sensing characteristics Ren, Chang;Ren, Chang;Ya, Chia-Ming;Yang, Chia-Ming;Lyu, Chengang;Lyu, Chengang;Hs, Chin-Yuan;Hsu, Chin-Yuan;Tsung-Cheng;Chen, Tsung-Cheng;Wa, Hau-Cheng;Wang, Hau-Cheng;Yang, Hao;Yang, Hao;Lin, Wei-Tse;Lin, Wei-Tse;Dorota, G.Pi;Dorota, G.Pijanowska;Wan, Jer-Chyi;Wang, Jer-Chyi;蔡宗叡;TSAI, JUNG-RUEY
亞洲大學 2015-02 ENGINEERED THRESHOLD VOLTAGE IN ALGAN/GAN HEMTS FOR NORMALLY-OFF OPERATION 蔡宗叡;TSAI, JUNG-RUEY;Cha, Yi-Sheng;Chang, Yi-Sheng;Wei, Kuo-Shu;Wei, Kuo-Shu;We, Ting-Ting;Wen, Ting-Ting
國立交通大學 2014-12-08T15:36:25Z Gate-all-around floating-gate memory device with triangular poly-Si nanowire channels Tsai, Jung-Ruey; Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan
國立交通大學 2014-12-08T15:32:59Z Low-voltage high-speed programming/erasing floating-gate memory device with gate-all-around polycrystalline silicon nanowire Lee, Ko-Hui; Tsai, Jung-Ruey; Chang, Ruey-Dar; Lin, Horng-Chih; Huang, Tiao-Yuan
亞洲大學 2014-03 Optimization of electrical properties of Al/LaAlO3/Indium Tin Oxide capacitor by adjusting oxygen pressures in pulsed laser deposition and applying post-deposition annealing at low temperatures 蔡宗叡;TSAI,JUNG-RUEY;馮文生;Feng, Wen-Sheng;簡伯修;Chien,Po-Hsiu;劉國辰;Liu, Kou-Chen
亞洲大學 2014-03 A Gate-All-Around Floating-Gate Memory Device with Triangular-Shaped Poly-Si Nanowire Channels 蔡宗叡;TSAI,JUNG-RUEY*;李克慧Lee, Ko-Hui Lee;林鴻志Lin, Horng-Chih;黃調元;Huang, Tiao-Yuan
亞洲大學 2014-03 Optimization of electrical properties of Al/LaAlO3/Indium Tin Oxide capacitor by adjusting oxygen pressures in pulsed laser deposition and applying post-deposition annealing at low temperatures 蔡宗叡;TSAI, JUNG-RUEY;馮文生;Feng, Wen-Sheng;簡伯修;Chien, Po-Hsiu;劉國辰;Liu, Kou-Chen
亞洲大學 2014-03 Phenethyl isothiocyanate triggers apoptosis in human malignant melanoma A375.S302 cells through reactive oxygen species and the mitochondria-dependent pathways 蔡宗叡;TSAI,JUNG-RUEY;馮文生;Feng, Wen-Sheng;簡伯修;Chien, Po-Hsiu;劉國辰;Liu, Kou-Chen
亞洲大學 2014-03 Phenethyl isothiocyanate triggers apoptosis in human malignant melanoma A375.S303 cells through reactive oxygen species and the mitochondria-dependent pathways 蔡宗叡;TSAI,JUNG-RUEY;李克慧;Lee, Ko-Hui Lee;林鴻志;Lin, Horng-Chih;黃調元;Huang, Tiao-Yuan
亞洲大學 2013.06 以高介電係數三氧化二釤與氧化鉿釤作為閘極絕緣層製作高遷移率之氧化銦鋅透明薄膜電晶體 陳柏任;蔡宗叡;TSAI, JUNG-RUEY;吳國宏;劉國辰;鄭峻文;吳孟奇
亞洲大學 2013.06 利用氧電漿改善二氧化鉿特性應用於氧化銦鎵鋅薄膜電晶體 彭立儀;林文凱;吳國宏;蔡宗叡;TSAI, JUNG-RUEY;劉國辰
亞洲大學 2013-10 A Gate-All-Around Floating-Gate Memory Device with Triangular-Shaped Poly-Si Nanowire Channels 蔡宗叡;TSAI, JUNG-RUEY;李克慧;Lee, Ko-Hui Lee;林鴻志;Lin, Horng-Chih;黃調元;Huang, Tiao-Yuan
亞洲大學 2013-10 A Gate-All-Around Floating-Gate Memory Device with Triangular-Shaped Poly-Si Nanowire Channels 蔡宗叡;TSAI, JUNG-RUEY;李克慧;Lee, Ko-Hui Lee;林鴻志;Lin, Horng-Chih;黃調元;Huang, Tiao-Yuan
亞洲大學 2013-10 Low-voltage high-speed programming/erasing floating-gate memory device with gate-all-around polycrystalline silicon nanowire Lee, Ko-Hui;李克慧;蔡宗叡;TSAI, JUNG-RUEY;張睿達;Chang, Ruey-Dar;林鴻志;Huang, Horng-Chih;黃調元;Tiao-Yuan, Huang
亞洲大學 2012.10 Room temperature fabricated transparent IZO thin-film transistor with a high-k gate dielectric of LaAlO3 film 蔡宗叡;TSAI, JUNG-RUEY;林文凱;Lin, Wen-Kai
亞洲大學 2012.07 Effects of Oxygen Pressure and Post-Deposition Annealing on the Characteristics of Pulsed Laser Deposited High-k Dielectric LaAlO3 Films on Indium Tin Oxide Films 蔡宗叡;TSAI, JUNG-RUEY;林文凱;Lin, Wen-Kai;馮文生;Feng, Wen-Sheng;劉國辰;Liu, Kou-Chen
亞洲大學 2012-09 Failure Analysis of Power MOSFETs based on Multi-finger Configuration under Unclamped Inductive Switching (UIS) Stress Condition 楊紹明;Yang, Shao-Ming;蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene
亞洲大學 2012-09 Shifting Time Waveform Induced CMOS Latch Up in Bootstrapping Technique Applications 蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene
亞洲大學 2012-09 Analysis of LDMOS for Effect of Fingers, Device-Width and Inductance on reverse recovery 蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
亞洲大學 2012-08 Analysis of LDMOS for Effect of Finger and Device-width on Gate Feedback Charge 楊紹明;Yang, Shao-Ming;蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene
亞洲大學 2012-03 A New Methodology to Investigate the Effect of Stress and Bias on 2DEG and Drain Current of AlGaN/GaN Based Heterostructure 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2012-03 A New Methodology to Investigate the Effect of Stress and Bias on 2DEG and Drain Current of AlGaN-GaN Based Heterostructure 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2012-03 Effect of finger and device-width on ruggedness of nLDMOS device under Single-pulse Unclamped Inductive Switching (UIS) conditions 蔡宗叡;Tsai, Jung-Ruey
亞洲大學 2012-03 Optimization of nLDMOS ruggedness under Unclamped Inductive Switching (UIS) stress conditions by poly-gate extension 蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2012-03 Analysis of LDMOS for Effect of Fingers, Device-Width and Inductance (Load) on Reverse Recovery 蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
亞洲大學 2011-11 Design of Multiple RESURF LDMOS with P-top rings and STI regions in 65nm CMOS Technology 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;蔡宗叡;Tsai, Jung-Ruey
亞洲大學 2011-11 Self-Consistent Electro-Thermo-Mechanical Analysis of AlN Passivation Effect on AlGaN/GaN HEMTs 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2011-11 Development of ESD Robustness Enhancement of a Novel 800V LDMOS Multiple RESURF with Linear P-top Rings 蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2011-08 Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2011-08 Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL and Gate Extended Field Plate Technologies 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2011-08 Application of Multi-Lateral Double Diffused Field Ring in Ultrahigh-Voltage Device MOS Transistor Design 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey
亞洲大學 2011-08 Effects of SiO2 passivation on AlGaN/GaN HEMT by self-consistent electro-thermal-mechanical simulation 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey
亞洲大學 2010-11 A 5V/200V SOI Device with a Vertically Linear Graded Drift Region 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey

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