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總筆數 :2851814
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造訪人次 :
44850515
線上人數 :
1277
教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"tsai jung ruey"的相關文件
顯示項目 31-40 / 40 (共2頁)
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| 亞洲大學 |
2012-03 |
Optimization of nLDMOS ruggedness under Unclamped Inductive Switching (UIS) stress conditions by poly-gate extension
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蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene;楊紹明;Yang, Shao-Ming |
| 亞洲大學 |
2012-03 |
Analysis of LDMOS for Effect of Fingers, Device-Width and Inductance (Load) on Reverse Recovery
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蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming;許健;Sheu, Gene |
| 亞洲大學 |
2011-11 |
Design of Multiple RESURF LDMOS with P-top rings and STI regions in 65nm CMOS Technology
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許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;蔡宗叡;Tsai, Jung-Ruey |
| 亞洲大學 |
2011-11 |
Self-Consistent Electro-Thermo-Mechanical Analysis of AlN Passivation Effect on AlGaN/GaN HEMTs
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許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming |
| 亞洲大學 |
2011-11 |
Development of ESD Robustness Enhancement of a Novel 800V LDMOS Multiple RESURF with Linear P-top Rings
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蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene;楊紹明;Yang, Shao-Ming |
| 亞洲大學 |
2011-08 |
Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL
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許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming |
| 亞洲大學 |
2011-08 |
Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL and Gate Extended Field Plate Technologies
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許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming |
| 亞洲大學 |
2011-08 |
Application of Multi-Lateral Double Diffused Field Ring in Ultrahigh-Voltage Device MOS Transistor Design
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楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey |
| 亞洲大學 |
2011-08 |
Effects of SiO2 passivation on AlGaN/GaN HEMT by self-consistent electro-thermal-mechanical simulation
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楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey |
| 亞洲大學 |
2010-11 |
A 5V/200V SOI Device with a Vertically Linear Graded Drift Region
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楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey |
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