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Taiwan Academic Institutional Repository >
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"tsai kun lin"
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| 國立屏東大學 |
2020 |
不動產經紀業者對於實價登錄之制度信任、知覺價值、滿意度、抱怨行為關係之研究
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蔡昆霖; Tsai, Kun-Lin |
| 南台科技大學 |
2012 |
平板電腦使用態度與意願之科技接受模型研究－以擁有智慧行動裝置之大專學生為對象
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蔡昆霖; Tsai-Kun-Lin |
| 國立高雄第一科技大學 |
2011/11/08 |
銀行合併策略與效益之個案研究-以合作金庫商業銀行為例
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蔡昆霖; Tsai Kun-Lin |
| 淡江大學 |
2010-06 |
Design of Low latency on-chip communication based on hybrid NoC Architecture
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Tsai, Kun-lin; Lai, Fei-pei; Pan, Chien-yu; Xiao, Di-sheng; Tan, Hsiang-jen; Lee, Hung-chang |
| 淡江大學 |
2010-06 |
Design of Low latency on-chip communicationbased on hybrid NoC Architecture
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李鴻璋; Tsai, Kun-lin; Lai, Fei-pei; Pan, Chien-yu; Xiao, Di-sheng; Tan, Hsiang-jen; Lee, Hung-chang |
| 東海大學 |
2010 |
應用於智慧電網之先進民生電能管理節能系統研發( II )
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溫志宏,蔡榮昱,劉榮春,林祝興,吳坤熹,龔正,洪政欣,蔡坤霖,杜景順,朱正忠,張文恭,楊朝棟,苗新元,陳家豪; Wen, Jyh-Horng; Miao, Hsin-Yuan; Tsai, Rung-Yu; Liu, Jung-Chun; Lin, Chu-Hsing; Wu, Quin-Cy; Gong, Jeng; Chen, Ja-Hao; Tsai, Kun-Lin; Do, Jing-Shan; Chu, Cheng-Chung W ; Chang, Gary W.&Yang, Chao-Tung; Hong, Jen-Shin |
| 國立臺灣海洋大學 |
2009 |
臺灣種植基改木瓜的潛在經濟效益評估
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詹滿色; Jan, Man-Ser; 蔡坤霖; Tsai, Kun-Lin |
| 大葉大學 |
2006-10 |
Effects of culture conditions on the mycelial growth and bioactive metabolites production in submerged culture of Cordyceps militaris
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Shih, Ing-Lung;Tsai, Kun-Lin;Hsieh, Chienyan |
| 國立臺灣大學 |
2006 |
使用多重電壓之低功率高階合成方法
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蔡坤霖; Tsai, Kun-Lin |
| 國立臺灣大學 |
2006 |
Low Power Scheduling Method using Multiple Supply Voltages
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Tsai, Kun-Lin; Lee, Ju-Yueh; Ruan, Shanq-Jang; Lai, Feipei |
| 國立臺灣大學 |
2005-05 |
A low power scheduling method using dual V/sub dd/ and dual V/sub th/
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Tsai, Kun-Lin; Chang, Szu-Wei; Lai, Feipei; Ruan, Shanq-Jang |
| 國立臺灣大學 |
2005 |
量子點紅外線偵測器之成長與光電特性
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蔡昆霖; Tsai, Kun-Lin |
| 國立臺灣大學 |
2005 |
Bipartitioning and encoding in low-power pipelined circuits
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Ruan, Shanq-Jang; Tsai, Kun-Lin; Naroska, Edwin; Lai, Feipei |
| 國立臺灣大學 |
2005 |
Low Power Dynamic Bus Encoding for Deep Sub-micron Design
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Tsai, Kun-Lin; Ruan, Shanq-Jang; Chen, Li-Wei; Lai Feipei; Naroska, Edwin |
| 國立臺灣大學 |
2004 |
Circuit Partition and Reordering Technique for Low Power IP
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Tsai, Kun-Lin; Ruan, Shanq-Jang; Huang, Chun-Ming; Naroska, Edwin; Lai, Feipei |
| 國立臺灣大學 |
2001-05 |
Synthesis of partition-codec architecture for low power and small area circuit design
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Ruan, Shanq-Jang; Lin, Jen-Chiun; Chen, Po-Hung; Tsai, Kun-Lin; Lai, Feipei |
| 國立臺灣大學 |
2001-05 |
An entropy-based algorithm to reduce area overhead for bipartition-codec architecture
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Chen, Po-Hung; Ruan, Shanq-Jang; Wu, Kuen-Pin; Hu, Dai-Xun; Lai, Feipei; Tsai, Kun-Lin |
| 國立臺灣大學 |
2001 |
A Bipartition-Codec Architecture to Reduce Power in Pipelined Circuits
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Ruan, Shanq-Jang; Shang, Rung-Ji; Lai, Feipei; Tsai, Kun-Lin |
| 國立臺灣大學 |
2000-12 |
An effective output-oriented algorithm for low power multipartition architecture
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Ruan, Shanq-Jang; Lin, Jen-Chiun; Chen, Po-Hung; Lai, Feipei; Tsai, Kun-Lin; Yu, Chung-Wei |
Showing items 1-19 of 19 (1 Page(s) Totally)
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